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src/cmd/asm/internal/asm/testdata/avx512enc/avx512bw.s
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 159.2K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/avx512cd.s
TEXT asmtest_avx512cd(SB), NOSPLIT, $0 VPBROADCASTMB2Q K1, X25 // 6262fe082ac9 VPBROADCASTMB2Q K5, X25 // 6262fe082acd VPBROADCASTMB2Q K1, X11 // 6272fe082ad9 VPBROADCASTMB2Q K5, X11 // 6272fe082add VPBROADCASTMB2Q K1, X17 // 62e2fe082ac9 VPBROADCASTMB2Q K5, X17 // 62e2fe082acd
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 12.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/avx512er.s
VRSQRT28SS X16, X6, K7, X11 // 62324d0fcdd8 VRSQRT28SS X28, X6, K7, X11 // 62124d0fcddc VRSQRT28SS X8, X6, K7, X11 // 62524d0fcdd8 VRSQRT28SS X16, X22, K7, X11 // 62324d07cdd8 VRSQRT28SS X28, X22, K7, X11 // 62124d07cddc VRSQRT28SS X8, X22, K7, X11 // 62524d07cdd8
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 28.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/avx512_4fmaps.s
V4FNMADDSS -17(BP)(SI*8), [X1-X4], K4, X11 // 6272770cab9cf5efffffff or 6272772cab9cf5efffffff or 6272774cab9cf5efffffff V4FNMADDSS (R15), [X1-X4], K4, X11 // 6252770cab1f or 6252772cab1f or 6252774cab1f V4FNMADDSS -17(BP)(SI*8), [X11-X14], K4, X11 // 6272270cab9cf5efffffff or 6272272cab9cf5efffffff or 6272274cab9cf5efffffff V4FNMADDSS (R15), [X11-X14], K4, X11 // 6252270cab1f or 6252272cab1f or 6252274cab1f
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 5.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64enc_extra.s
SHA1MSG1 (R11), X11 // 450f38c91b SHA1MSG1 X2, X11 // 440f38c9da SHA1MSG1 X11, X11 // 450f38c9db SHA1MSG2 (BX), X2 // 0f38ca13 SHA1MSG2 (R11), X2 // 410f38ca13 SHA1MSG2 X2, X2 // 0f38cad2 SHA1MSG2 X11, X2 // 410f38cad3 SHA1MSG2 (BX), X11 // 440f38ca1b SHA1MSG2 (R11), X11 // 450f38ca1b SHA1MSG2 X2, X11 // 440f38cada SHA1MSG2 X11, X11 // 450f38cadb
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Thu Feb 20 11:20:03 UTC 2025 - 57.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/avx512_vbmi2.s
VPSHLDW $65, X24, X7, K3, X11 // 6213c50b70d841 VPSHLDW $65, X20, X7, K3, X11 // 6233c50b70dc41 VPSHLDW $65, X7, X7, K3, X11 // 6273c50b70df41 VPSHLDW $65, 7(SI)(DI*8), X7, K3, X11 // 6273c50b709cfe0700000041 VPSHLDW $65, -15(R14), X7, K3, X11 // 6253c50b709ef1ffffff41 VPSHLDW $65, X24, X0, K3, X11 // 6213fd0b70d841
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 97.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
// 31.7.5: Vector Strided Instructions VLSE8V (X10), X11, V3 // 8701b50a VLSE8V (X10), X11, V0, V3 // 8701b508 VLSE16V (X10), X11, V3 // 8751b50a VLSE16V (X10), X11, V0, V3 // 8751b508 VLSE32V (X10), X11, V3 // 8761b50a VLSE32V (X10), X11, V0, V3 // 8761b508 VLSE64V (X10), X11, V3 // 8771b50a VLSE64V (X10), X11, V0, V3 // 8771b508 VSSE8V V3, X11, (X10) // a701b50a VSSE8V V3, X11, V0, (X10) // a701b508
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed May 21 14:19:19 UTC 2025 - 49.1K bytes - Viewed (0) -
lib/fips140/v1.0.0.zip
AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 176(AX), X11 AESENC X11, X0 AESENC X11, X1 AESENC X11, X2 AESENC X11, X3 AESENC X11, X4 AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 192(AX), X11 JE encLast1 AESENC X11, X0 AESENC X11, X1 AESENC X11, X2 AESENC X11, X3 AESENC X11, X4 AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 208(AX), X11 AESENC X11, X0 AESENC X11, X1 AESENC X11, X2 AESENC X11, X3 AESENC X11, X4 AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 224(AX), X11 encLast1: AESENCLAST...
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jan 29 15:10:35 UTC 2025 - 635K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64error.s
EXTRACTPS $-1, X2, (BX) // ERROR "invalid instruction" // VSIB addressing does not permit non-vector (X/Y) // scaled index register. VPGATHERDQ X12,(R13)(AX*2), X11 // ERROR "invalid instruction" VPGATHERDQ X2, 664(BX*1), X1 // ERROR "invalid instruction" VPGATHERDQ Y2, (BP)(AX*2), Y1 // ERROR "invalid instruction" VPGATHERDQ Y5, 664(DX*8), Y6 // ERROR "invalid instruction"
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jun 14 00:03:57 UTC 2023 - 8.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64error.s
MOVWU X5, (X6) // ERROR "unsupported unsigned store" MOVF F0, F1, F2 // ERROR "illegal MOV instruction" MOVD F0, F1, F2 // ERROR "illegal MOV instruction" MOV X10, X11, X12 // ERROR "illegal MOV instruction" MOVW X10, X11, X12 // ERROR "illegal MOV instruction" RORI $64, X5, X6 // ERROR "immediate out of range 0 to 63" SLLI $64, X5, X6 // ERROR "immediate out of range 0 to 63"
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Thu May 08 08:53:43 UTC 2025 - 24.8K bytes - Viewed (0)