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Results 11 - 20 of 30 for SIMD (0.04 sec)

  1. src/cmd/internal/obj/arm64/doc.go

    32-bit variant ldr => MOVWU;
    ldrb => MOVBU; ldrh => MOVHU;
    ldrsb, sturb, strb => MOVB;
    ldrsh, sturh, strh =>  MOVH.
    
    4. Go moves conditions into opcode suffix, like BLT.
    
    5. Go adds a V prefix for most floating-point and SIMD instructions, except cryptographic extension
    instructions and floating-point(scalar) instructions.
    
    Examples:
    
    	VADD V5.H8, V18.H8, V9.H8         <=>      add v9.8h, v18.8h, v5.8h
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Aug 07 00:21:42 UTC 2023
    - 9.6K bytes
    - Viewed (0)
  2. src/math/exp_amd64.s

    // license that can be found in the LICENSE file.
    
    #include "textflag.h"
    
    // The method is based on a paper by Naoki Shibata: "Efficient evaluation
    // methods of elementary functions suitable for SIMD computation", Proc.
    // of International Supercomputing Conference 2010 (ISC'10), pp. 25 -- 32
    // (May 2010). The paper is available at
    // https://link.springer.com/article/10.1007/s00450-010-0108-2
    //
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 15 15:48:19 UTC 2021
    - 4.2K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/arm64/a.out.go

    	REG_F15
    	REG_F16
    	REG_F17
    	REG_F18
    	REG_F19
    	REG_F20
    	REG_F21
    	REG_F22
    	REG_F23
    	REG_F24
    	REG_F25
    	REG_F26
    	REG_F27
    	REG_F28
    	REG_F29
    	REG_F30
    	REG_F31
    
    	// SIMD
    	REG_V0
    	REG_V1
    	REG_V2
    	REG_V3
    	REG_V4
    	REG_V5
    	REG_V6
    	REG_V7
    	REG_V8
    	REG_V9
    	REG_V10
    	REG_V11
    	REG_V12
    	REG_V13
    	REG_V14
    	REG_V15
    	REG_V16
    	REG_V17
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Oct 18 17:56:30 UTC 2023
    - 18.1K bytes
    - Viewed (0)
  4. src/vendor/golang.org/x/crypto/internal/poly1305/sum_s390x.s

    // powers of r that we need from the original equation.
    //
    // Notation:
    //
    //   h - accumulator
    //   r - key
    //   m - message
    //
    //   [a, b]       - SIMD register holding two 64-bit values
    //   [a, b, c, d] - SIMD register holding four 32-bit values
    //   xᵢ[n]        - limb n of variable x with bit width i
    //
    // Limbs are expressed in little endian order, so for 26-bit
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:33 UTC 2023
    - 17.5K bytes
    - Viewed (0)
  5. internal/s3select/simdj/record.go

    	}
    	return nil
    }
    
    // Replace the underlying buffer of json data.
    func (r *Record) Replace(k interface{}) error {
    	v, ok := k.(simdjson.Object)
    	if !ok {
    		return fmt.Errorf("cannot replace internal data in simd json record with type %T", k)
    	}
    	r.object = v
    	return nil
    }
    
    // NewRecord - creates new empty JSON record.
    func NewRecord(f sql.SelectObjectFormat, obj simdjson.Object) *Record {
    	return &Record{
    Registered: Sun Jun 16 00:44:34 UTC 2024
    - Last Modified: Tue Jun 01 21:59:40 UTC 2021
    - 5.4K bytes
    - Viewed (0)
  6. src/internal/cpu/cpu.go

    	HasSHA2    bool
    	HasSHA512  bool
    	HasCRC32   bool
    	HasATOMICS bool
    	HasCPUID   bool
    	IsNeoverse bool
    	_          CacheLinePad
    }
    
    var MIPS64X struct {
    	_      CacheLinePad
    	HasMSA bool // MIPS SIMD architecture
    	_      CacheLinePad
    }
    
    // For ppc64(le), it is safe to check only for ISA level starting on ISA v3.00,
    // since there are no optional categories. There are some exceptions that also
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 19:57:43 UTC 2024
    - 7.1K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/arch/arm64.go

    			a.Index = num
    		case "D":
    			if !isIndex {
    				return nil
    			}
    			a.Reg = arm64.REG_ELEM + (reg & 31) + ((arm64.ARNG_D & 15) << 5)
    			a.Index = num
    		default:
    			return errors.New("unsupported simd register extension type: " + ext)
    		}
    	} else {
    		return errors.New("invalid register and extension combination")
    	}
    	return nil
    }
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Sep 29 09:04:58 UTC 2022
    - 10.4K bytes
    - Viewed (0)
  8. go.mod

    	github.com/minio/colorjson v1.0.8 // indirect
    	github.com/minio/filepath v1.0.0 // indirect
    	github.com/minio/mc v0.0.0-20240612143403-e7c9a733c680 // indirect
    	github.com/minio/md5-simd v1.1.2 // indirect
    	github.com/minio/pkg/v2 v2.0.19 // indirect
    	github.com/minio/websocket v1.6.0 // indirect
    	github.com/mitchellh/mapstructure v1.5.0 // indirect
    Registered: Sun Jun 16 00:44:34 UTC 2024
    - Last Modified: Thu Jun 13 22:53:53 UTC 2024
    - 11.5K bytes
    - Viewed (0)
  9. internal/s3select/select.go

    		}
    		buf.WriteString(s3Select.Output.CSVArgs.RecordDelimiter)
    
    		return nil
    	case jsonFormat:
    		err := record.WriteJSON(buf)
    		if err != nil {
    			return err
    		}
    		// Trim trailing newline from non-simd output
    		if buf.Bytes()[buf.Len()-1] == '\n' {
    			buf.Truncate(buf.Len() - 1)
    		}
    		buf.WriteString(s3Select.Output.JSONArgs.RecordDelimiter)
    
    		return nil
    	}
    
    Registered: Sun Jun 16 00:44:34 UTC 2024
    - Last Modified: Fri May 24 23:05:23 UTC 2024
    - 21K bytes
    - Viewed (0)
  10. src/math/big/arith_arm64.s

    //go:build !math_big_pure_go
    
    #include "textflag.h"
    
    // This file provides fast assembly versions for the elementary
    // arithmetic operations on vectors implemented in arith.go.
    
    // TODO: Consider re-implementing using Advanced SIMD
    // once the assembler supports those instructions.
    
    // func addVV(z, x, y []Word) (c Word)
    TEXT ·addVV(SB),NOSPLIT,$0
    	MOVD	z_len+8(FP), R0
    	MOVD	x+24(FP), R8
    	MOVD	y+48(FP), R9
    	MOVD	z+0(FP), R10
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 11.8K bytes
    - Viewed (0)
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