MOVD	$0, acc2
	MOVD	p256const1<>(SB), acc3
	// Load the original value
	LDP	0*16(a_ptr), (t0, t1)
	LDP	1*16(a_ptr), (t2, t3)
	// Speculatively subtract
	SUBS	t0, acc0
	SBCS	t1, acc1
	SBCS	t2, acc2
	SBC	t3, acc3
	// If condition is 0, keep original value
	CMP	$0, hlp0
	CSEL	EQ, t0, acc0, acc0
	CSEL	EQ, t1, acc1, acc1
	CSEL	EQ, t2, acc2, acc2
	CSEL	EQ, t3, acc3, acc3
	// Store result

	// NGC <Wd>, <Wm>
	{0xffe0ffe0, 0x5a0003e0, NGC, instArgs{arg_Wd, arg_Wm}, nil},
	// SBC <Wd>, <Wn>, <Wm>
	{0xffe0fc00, 0x5a000000, SBC, instArgs{arg_Wd, arg_Wn, arg_Wm}, nil},
	// NGC <Xd>, <Xm>
	{0xffe0ffe0, 0xda0003e0, NGC, instArgs{arg_Xd, arg_Xm}, nil},
	// SBC <Xd>, <Xn>, <Xm>
	{0xffe0fc00, 0xda000000, SBC, instArgs{arg_Xd, arg_Xn, arg_Xm}, nil},
	// NGCS <Wd>, <Wm>

			as2 = p.As // ADD, SUB, ORR, EOR, BIC
		case ARSB:
			as2 = AADD // RSB -> RSB/ADD pair
		case AADC:
			as2 = AADD // ADC -> ADC/ADD pair
		case ASBC:
			as2 = ASUB // SBC -> SBC/SUB pair
		case ARSC:
			as2 = AADD // RSC -> RSC/ADD pair
		default:
			c.ctxt.Diag("unknown second op for %v", p)
		}
		o1 = c.oprrr(p, p.As, int(p.Scond))
		o2 = c.oprrr(p, as2, int(p.Scond))

	RORW $28, R14, R15                         // cf718e13
	RORW R3, R12, R3                           // 832dc31a
	ROR R0, R23, R2                            // e22ec09a
	SBCW R4, R8, R24                           // 1801045a
	SBC R25, R10, R26                          // 5a0119da
	SBCSW R27, R19, R19                        // 73021b7a
	SBCS R5, R9, R5                            // 250105fa
	SBFIZW $9, R10, $18, R22                   // 56451713

	v_1 := v.Args[1]
	v_0 := v.Args[0]
	// match: (SBC (MOVWconst [c]) x flags)
	// result: (RSCconst [c] x flags)
	for {
		if v_0.Op != OpARMMOVWconst {
			break
		}
		c := auxIntToInt32(v_0.AuxInt)
		x := v_1
		flags := v_2
		v.reset(OpARMRSCconst)
		v.AuxInt = int32ToAuxInt(c)
		v.AddArg2(x, flags)
		return true
	}
	// match: (SBC x (MOVWconst [c]) flags)

{"Name":"SBC","Bits":"0|1|0|1|1|0|1|0|0|0|0|Rm:5|0|0|0|0|0|0|Rn:5|Rd:5","Arch":"32-bit variant","Syntax":"SBC <Wd>, <Wn>, <Wm>","Code":"","Alias":"This instruction is used by the alias NGC."},
{"Name":"SBC","Bits":"1|1|0|1|1|0|1|0|0|0|0|Rm:5|0|0|0|0|0|0|Rn:5|Rd:5","Arch":"64-bit variant","Syntax":"SBC <Xd>, <Xn>, <Xm>","Code":"","Alias":"This instruction is used by the alias NGC."},

				"audio/vnd.nokia.mobile-xmf",
				"audio/vnd.nortel.vbk",
				"audio/vnd.nuera.ecelp4800",
				"audio/vnd.nuera.ecelp7470",
				"audio/vnd.nuera.ecelp9600",
				"audio/vnd.octel.sbc",
				"audio/vnd.qcelp",
				"audio/vnd.rhetorex.32kadpcm",
				"audio/vnd.sealedmedia.softseal.mpeg",
				"audio/vnd.vmx.cvsd",
				"audio/vorbis-config",
				"audio/x-aac",
				"audio/x-adbcm",

// Note that these semantics differ from x86: the carry flag has the opposite
// sense on a subtraction!
//
//	On amd64, C=1 represents a borrow, e.g. SBB on amd64 does x - y - C.
//	On arm64, C=0 represents a borrow, e.g. SBC on arm64 does x - y - ^C.
//	 (because it does x + ^y + C).
//
// See https://en.wikipedia.org/wiki/Carry_flag#Vs._borrow_flag
type flagConstant uint8

	CCMN	MI, ZR, R1, $4	                 // e44341ba
	// MADD Rn,Rm,Ra,Rd
	MADD	R1, R2, R3, R4                   // 6408019b
	// CLS
	CLSW	R1, R2
	CLS	R1, R2
	SBC	$0, R1                           // 21001fda
	SBCW	$0, R1                           // 21001f5a
	SBCS	$0, R1                           // 21001ffa
	SBCSW	$0, R1                           // 21001f7a

    <glob pattern="*.ecelp7470"/>
  </mime-type>
  <mime-type type="audio/vnd.nuera.ecelp9600">
    <glob pattern="*.ecelp9600"/>
  </mime-type>
  <mime-type type="audio/vnd.octel.sbc"/>
  <mime-type type="audio/vnd.qcelp"/>
  <mime-type type="audio/vnd.rhetorex.32kadpcm"/>
  <mime-type type="audio/vnd.sealedmedia.softseal.mpeg"/>
  <mime-type type="audio/vnd.vmx.cvsd"/>