PLXSD 1234(R1), $0, V1                  // 04000000a82104d2
	PLXSSP 5(R1), $0, V2                    // 04000000ac410005
	PLXSSP 5(R0), $1, V2                    // 04100000ac400005
	PLXV 12346891(R6), $1, VS44             // 041000bccd86660b
	PLXVP 12345678(R4), $1, VS4             // 041000bce884614e
	PMXVBF16GER2 VS1, VS2, $1, $2, $3, A1   // 0790c012ec811198
	PMXVBF16GER2NN VS1, VS2, $1, $2, $3, A1 // 0790c012ec811790

	MOVW.S	R3, CPSR           // ERROR "invalid .S suffix"
	MOVW.S	$0, CPSR           // ERROR "invalid .S suffix"
	MOVM.S	(R0), [R2-R4]      // ERROR "invalid .S suffix"
	MOVM.S	[R1-R6], (R9)      // ERROR "invalid .S suffix"
	SWPW.S	R1, (R2), R3       // ERROR "invalid .S suffix"
	MOVF.S	(R0), F1           // ERROR "invalid .S suffix"
	MOVF.S	F9, (R4)           // ERROR "invalid .S suffix"

to a <code>NOP</code> instruction).
</p>

<p>
Addressing modes:
</p>

<ul>

<li>
<code>(R5)(R6*1)</code>: The location at <code>R5</code> plus <code>R6</code>.
It is a scaled mode as on the x86, but the only scale allowed is <code>1</code>.
</li>

</ul>

<h3 id="mips">MIPS, MIPS64</h3>

<p>

dst+0(FP), R4 MOVV a+8(FP), R5 MOVV b+16(FP), R6 MOVV n+24(FP), R7 SMALL_TAIL xor_256_lasx_check: SGTU $256, R7, R8 BNE R8, xor_128_lasx_check xor_256_lasx_loop: SUBV $256, R7 XVMOVQ (R5), X0 XVMOVQ 32(R5), X1 XVMOVQ 64(R5), X2 XVMOVQ 96(R5), X3 XVMOVQ 128(R5), X4 XVMOVQ 160(R5), X5 XVMOVQ 192(R5), X6 XVMOVQ 224(R5), X7 XVMOVQ (R6), X8 XVMOVQ 32(R6), X9 XVMOVQ 64(R6), X10 XVMOVQ 96(R6), X11 XVMOVQ 128(R6), X12 XVMOVQ 160(R6), X13 XVMOVQ 192(R6), X14 XVMOVQ 224(R6), X15 XVXORV X0, X8, X8 XVXORV X1, X9, X9...

sure it's zero MOVD $0, R4 // c = 0 MOVD R5, R12 AND $-2, R12 CMPBGE R5, $2, A6 BR E6 A6: MOVD (R8)(R1*1), R6 MULHDU R9, R6 MOVD (R2)(R1*1), R10 ADDC R10, R11 // add to low order bits ADDE R0, R6 ADDC R4, R11 ADDE R0, R6 MOVD R6, R4 MOVD R11, (R2)(R1*1) MOVD (8)(R8)(R1*1), R6 MULHDU R9, R6 MOVD (8)(R2)(R1*1), R10 ADDC R10, R11 // add to low order bits ADDE R0, R6 ADDC R4, R11 ADDE R0, R6 MOVD R6, R4 MOVD R11, (8)(R2)(R1*1) ADD $16, R1 // i*8 + 8 ADD $2, R7 // i++ CMPBLT R7, R12, A6 BR E6 L6: // TODO:...

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