return
			}
			a.Type = obj.TYPE_REGREG
			a.Offset = int64(r2)
			// Nothing may follow
			return
		}
		if p.arch.Family == sys.PPC64 {
			// Special form for PPC64: (R1+R2); alias for (R1)(R2).
			if prefix != 0 || scale != 0 {
				p.errorf("illegal address mode for register+register")
				return
			}
			a.Type = obj.TYPE_MEM
			a.Scale = 0

-Key":"IAAfAL913fvHj96SmuY2+m0NZi5oI4Es15UVP4Zrc/IoxpnD5shPuKNvTXXw==","X-Minio-Internal-Server-Side-Encryption-Seal-Algorithm":"DAREv2-HMAC-SHA256","content-type":"application/octet-stream"}},{"Bucket":"buck1","Name":"go_113/src/cmd/internal/obj/ppc64/obj9.go","UserDef":{"X-Minio-Internal-Server-Side-Encryption-Iv":"ECGlyS2+y2dShNZzYqEUpxrwX1eZ=","X-Minio-Internal-Server-Side-Encryption-S3-Kms-Key-Id":"my-minio-key","X-Minio-Internal-Server-Side-Encryption-S3-Kms-Sealed-Key":"IAAfAIaYGDN5CmvtX8...

//go:noescape func expandKeyAsm(nr int, key *byte, enc *uint32, dec *uint32) var supportsAES = cpu.X86HasAES && cpu.X86HasSSE41 && cpu.X86HasSSSE3 || cpu.ARM64HasAES || cpu.PPC64 || cpu.PPC64le func init() { if cpu.AMD64 { impl.Register("aes", "AES-NI", &supportsAES) } if cpu.ARM64 { impl.Register("aes", "Armv8.0", &supportsAES) } if cpu.PPC64 || cpu.PPC64le { // The POWER architecture doesn't have a way to turn off AES support // at runtime with GODEBUG=cpu.something=off, so introduce a new GODEBUG // knob...

//go:noescape func expandKeyAsm(nr int, key *byte, enc *uint32, dec *uint32) var supportsAES = cpu.X86HasAES && cpu.X86HasSSE41 && cpu.X86HasSSSE3 || cpu.ARM64HasAES || cpu.PPC64 || cpu.PPC64le func init() { if cpu.AMD64 { impl.Register("aes", "AES-NI", &supportsAES) } if cpu.ARM64 { impl.Register("aes", "Armv8.0", &supportsAES) } if cpu.PPC64 || cpu.PPC64le { // The POWER architecture doesn't have a way to turn off AES support // at runtime with GODEBUG=cpu.something=off, so introduce a new GODEBUG // knob...