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Results 11 - 20 of 22 for 4x256xf32 (0.27 sec)

  1. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nhwc.mlir

      func.return %y : tensor<1x64x28x28xf32>
    }
    
    // CHECK-LABEL: bias_add_nchw
    func.func @bias_add_nchw(%arg0: tensor<1x256x150x150xf32>, %arg1: tensor<256xf32>) -> tensor<1x256x150x150xf32> {
      // CHECK: (%[[ARG0:.*]]: tensor<1x256x150x150xf32>, %[[ARG1:.*]]: tensor<256xf32>)
      // CHECK: %[[CST:.*]] = "tf.Const"() <{value = dense<[0, 2, 3, 1]> : tensor<4xi64>}>
      // CHECK: %[[R0:.*]] = "tf.Transpose"(%[[ARG0]], %[[CST]])
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 4.5K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/quantization/tensorflow/tests/prepare_lifting.mlir

      %1 = "tf.BiasAdd"(%0, %cst_0) {data_format = "NHWC"} : (tensor<?x?x?x256xf32>, tensor<256xf32>) -> tensor<?x?x?x256xf32>
      %2 = "tf.Mul"(%1, %cst_1) : (tensor<?x?x?x256xf32>, tensor<256xf32>) -> tensor<?x?x?x256xf32>
      func.return %2 : tensor<?x?x?x256xf32>
    }
    // CHECK: func @conv2d_with_large_weight_and_mul
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Feb 14 03:24:59 UTC 2024
    - 33.3K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/lite/tests/mlir2flatbuffer/cast_bf16.mlir

    // CHECK-NEXT:        buffer: 4
    // CHECK-NEXT:      } ],
    // CHECK-NEXT:      signature_defs: [  ]
    // CHECK-NEXT:    }
    
      %0 = "tfl.cast" (%arg0) : (tensor<4x5xbf16>) -> tensor<4x5xf32> loc("cast1")
      %1 = "tfl.cast" (%0) : (tensor<4x5xf32>) -> tensor<4x5xbf16> loc("cast2")
      func.return %1 : tensor<4x5xbf16>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Mar 18 21:28:19 UTC 2024
    - 2.5K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/tensorflow/tests/tpu_sharding_identification.mlir

    func.func @check_propagation_for_output_sharding_from_tf_matmul(%arg0: tensor<2x4xf32>, %arg1: tensor<4x2xf32>) -> (tensor<1x2xf32>, tensor<1x2xf32>) {
      %0 = "tf_device.cluster_func"(%arg0, %arg1) {func = @_func, use_spmd_for_xla_partitioning = true, use_tpu = true, num_cores_per_replica = 2 : i64} : (tensor<2x4xf32>, tensor<4x2xf32>) -> tensor<2x2xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Feb 20 19:07:52 UTC 2024
    - 47.5K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tensorflow/tests/lower_tf.mlir

      // CHECK-DAG: %[[RET:.*]] = "tf.SelectV2"(%[[INDICATOR]], %[[INPUT]], %[[ZEROS_LIKE]]) : (tensor<4x5xi1>, tensor<4x5xf32>, tensor<4x5xf32>) -> tensor<4x5xf32>
      // CHECK-DAG: return %[[RET]]
      %0 = "tf.MatrixBandPart"(%input, %num_lower, %num_upper) : (tensor<4x5xf32>, tensor<i64>, tensor<i64>) -> tensor<4x5xf32>
      func.return %0 : tensor<4x5xf32>
    }
    
    // CHECK-LABEL: func @rank3_matrix_band_part
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Jan 05 18:35:42 UTC 2024
    - 92K bytes
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  6. tensorflow/compiler/mlir/tensorflow/tests/canonicalize.mlir

      %2 = "tf.AddV2"(%0, %arg0) : (tensor<1x2xf32>, tensor<4x1xf32>) -> tensor<4x2xf32>
    
      // If operand has the same shape as a result, we can fold it.
      %3 = "tf.AddV2"(%arg1, %0) : (tensor<4x2xf32>, tensor<1x2xf32>) -> tensor<4x2xf32>
      %4 = "tf.AddV2"(%0, %arg1) : (tensor<1x2xf32>, tensor<4x2xf32>) -> tensor<4x2xf32>
    
      // CHECK: %[[CONST:.*]] = "tf.Const"()
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 09 22:07:10 UTC 2024
    - 132.1K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir

      %0:3 = "tf.Unpack"(%input) {axis = 1} : (tensor<4x3x6xf32>) -> (tensor<4x6xf32>, tensor<4x6xf32>, tensor<4x6xf32>)
      // return %[[RES1]], %[[RES2]], %[[RES3]]
      func.return %0#0, %0#1, %0#2 : tensor<4x6xf32>, tensor<4x6xf32>, tensor<4x6xf32>
    }
    
    // -----
    
    // CHECK-LABEL: func @unpack_dynamic
    func.func @unpack_dynamic(%arg0: tensor<?x?x2xf32>) -> (tensor<?x?xf32>, tensor<?x?xf32>) {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon May 06 18:46:23 UTC 2024
    - 335.5K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf.cc

    //                (tensor<4x2xf32>, tensor<4x2xf32>, tensor<4x2xf32>)
    //
    // will be converted into:
    //
    //   %0 = "mhlo.slice"(%input) {
    //             limit_indices = dense<[4, 2]> : tensor<2xi64>,
    //             start_indices = dense<0> : tensor<2xi64>,
    //             strides = dense<1> : tensor<2xi64>} :
    //        (tensor<4x6xf32>) -> tensor<4x2xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 20:00:43 UTC 2024
    - 291.8K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/lite/tests/legalize-tf.mlir

      %0 = "tf.ScatterNd"(%arg0, %arg1, %arg2) : (tensor<4x2x2xi32>, tensor<4x2x3xf32>, tensor<3xi32>) -> tensor<10x2x3xf32>
      func.return %0 : tensor<10x2x3xf32>
    
    // CHECK-LABEL:scatterNdHigherRankIndices
    // CHECK: %[[RES:.*]] = "tfl.scatter_nd"(%arg0, %arg1, %arg2) : (tensor<4x2x2xi32>, tensor<4x2x3xf32>, tensor<3xi32>) -> tensor<10x2x3xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Jun 05 01:54:33 UTC 2024
    - 153.4K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/tensorflow/tests/shape_inference.mlir

      func.func @set_dynamic_dimension_size_static_dim(%input: tensor<4x5xf32>, %size: tensor<i32>) -> tensor<*xf32> {
        %dimension = "tf.Const"() { value = dense<0> : tensor<i32> } : () -> tensor<i32>
    
        // CHECK: (tensor<4x5xf32>, tensor<i32>, tensor<i32>) -> tensor<?x5xf32>
        %0 = "tf.XlaSetDynamicDimensionSize"(%input, %dimension, %size) : (tensor<4x5xf32>, tensor<i32>, tensor<i32>) -> tensor<*xf32>
        func.return %0 : tensor<*xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jan 23 17:24:10 UTC 2024
    - 167.4K bytes
    - Viewed (0)
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