if target.IsAIX() && rt == objabi.R_POWER_TLS_LE {
				// Fixup val, an addis/addi pair of instructions, which generate a 32b displacement
				// from the threadpointer (R13), into a 16b relocation. XCOFF only supports 16b
				// TLS LE relocations. Likewise, verify this is an addis/addi sequence.
				const expectedOpcodes = 0x3C00000038000000
				const expectedOpmasks = 0xFC000000FC000000

	MOVD	0(R10), R11
	MOVD	g_m(R11), R3
	MOVD	m_p(R3), R3
	MOVD	p_raceprocctx(R3), R3
	MOVD	R3, (R4)
	RET

rest:
	// Save registers according to the host PPC64 ABI
	// and reserve 16B for argument storage.
	STACK_AND_SAVE_HOST_TO_GO_ABI(16)

	// Load g, and switch to g0 if not already on it.
	MOVD	runtime·tls_g(SB), R10
	MOVD	0(R10), g

	MOVD	g_m(g), R7
	MOVD	m_g0(R7), R8
	CMP	g, R8

		{[]byte(x16pgm), "align=0x20", false},   // Increased alignment needed
		{[]byte(x32pgm), "align=0x40", false},   // Worst case alignment needed
		{[]byte(x64pgm), "align=0x0", true},     // 0 aligned is default (16B) alignment
		{[]byte(x64pgmA64), "align=0x40", true}, // extra alignment + nop
		{[]byte(x64pgmA32), "align=0x20", true}, // extra alignment + nop
	}

	for _, pgm := range pgms {
		tmpfile := filepath.Join(dir, "x.s")

		result := a.r.String()
		arrange := a.a.String()
		c := []rune(arrange)
		switch len(c) {
		case 3:
			c[1], c[2] = c[2], c[1] // .8B -> .B8
		case 4:
			c[1], c[2], c[3] = c[3], c[1], c[2] // 16B -> B16
		}
		arrange = string(c)
		result += arrange
		if a.cnt > 0 {
			result = "[" + result
			for i := 1; i < int(a.cnt); i++ {
				cur := V0 + Reg((uint16(a.r)-uint16(V0)+uint16(i))&31)

	Arrangement1Q
)

func (a Arrangement) String() (result string) {
	switch a {
	case ArrangementB:
		result = ".B"
	case Arrangement8B:
		result = ".8B"
	case Arrangement16B:
		result = ".16B"
	case ArrangementH:
		result = ".H"
	case Arrangement4H:
		result = ".4H"
	case Arrangement8H:
		result = ".8H"
	case ArrangementS:
		result = ".S"
	case Arrangement2S:
		result = ".2S"

			// The assembler can generate this opcode in 1 (on Power10) or 2 opcodes.

		// Otherwise, see if the large constant can be generated with 2 instructions. If not, load it from memory.
		default:
			// Is this a shifted 16b constant? If so, rewrite it to avoid a creating and loading a constant.
			val := p.From.Offset
			shift := bits.TrailingZeros64(uint64(val))
			mask := int64(0xFFFF) << shift

				// crossing a 64B boundary when the linker assigns the final
				// PC.
				switch p.Pc & 31 {
				case 28: // 32B crossing
					falign = 64
				case 12: // 16B crossing
					if falign < 64 {
						falign = 32
					}
				}
			}

			pc += int64(m)
		}

		c.cursym.Size = pc
	}

	c.cursym.Size = pc
	c.cursym.Func().Align = falign