}

template <>
inline std::vector<int64_t> GetVector(DenseElementsAttr elements) {
  auto type = elements.getType();
  auto elemType = type.getElementType();
  if (elemType.isSignlessInteger(64)) {
    auto vec = llvm::to_vector(llvm::map_range(
        elements.getValues<APInt>(),
        [&](APInt value) -> int64_t { return value.getSExtValue(); }));
    return std::vector<int64_t>(vec.begin(), vec.end());
  }

std::vector<DataType> DataTypeSetToVector(DataTypeSet set);

// Returns a vector of shapes intended to be "interesting" test cases.
// Currently, this returns scalar, 1D vector, 2D matrix, and a 4D tensor shapes
std::vector<std::vector<int64_t>> InterestingShapes();

// Returns a TensorHandle of `dtype` and `shape`, filled with `value`.
// `dtype` must be an integer dtype, float, or double.
// If a TensorHandle cannot be created successfully, this function will

          dot.getDotDimensionNumbers();
      ArrayRef<int64_t> rhs_contracting_dims =
          dimension_numbers.getRhsContractingDimensions();
      ArrayRef<int64_t> rhs_batching_dims =
          dimension_numbers.getRhsBatchingDimensions();
      int64_t rank = dot.getRhs().getType().cast<TensorType>().getRank();
      for (int i = 0; i < rank; ++i) {

#include <vector>

#include "tensorflow/core/platform/types.h"

struct TFE_TensorDebugInfo {
  explicit TFE_TensorDebugInfo(const std::vector<int64_t>& dims)
      : dev_dims(dims) {}

  // Fully-padded, minor-to-major.
  std::vector<int64_t> dev_dims;
};

  // Keeps track of dtype counts per op.
  void CountOp(DenseMap<StringRef, llvm::StringMap<int64_t>> &op_count_map,
               StringRef op_name, StringRef dtype);

 private:
  llvm::StringMap<int64_t> op_with_dialect_count_;
  DenseMap<StringRef, llvm::StringMap<int64_t>> op_dtype_count_;
  llvm::StringMap<int64_t> dialect_count_;
  llvm::StringMap<StringRef> dialect_name_of_;
  llvm::StringMap<StringRef> op_name_of_;

                                                  float data[], int64_t dims[],
                                                  int num_dims);

// Get a Matrix TensorHandle with given float values and dimensions
TFE_TensorHandle* TestTensorHandleWithDimsFloat(TFE_Context* ctx, float data[],
                                                int64_t dims[], int num_dims);

      CreateI8F32UniformQuantizedPerAxisType(
          UnknownLoc::get(&ctx_), ctx_,
          /*scales=*/SmallVector<double, 2>{1.0, 1.0},
          /*zero_points=*/SmallVector<int64_t, 2>{0, 0},
          /*quantization_dimension=*/0);

  // Storage type of `i8` is currently verifiable as `unsigned` in `Types.cpp`.
  EXPECT_TRUE(quantized_type.getStorageType().isSignlessInteger(8));
}

  static std::pair<int64_t, int64_t> GetBiasDimAndSliceSize(
      ArrayRef<int64_t> filter_shape, AffineOpType op) {
    // Channel dimension index is specified as op property
    auto channel_index_iter = filter_shape.begin();
    std::advance(channel_index_iter, op.GetChannelDimIndex());
    // The slide size is the size of the data in higher dimensions.
    int64_t slice_size =

LogicalResult CreateInitBufferValue(ArrayRef<int64_t> element_shape,
                                    int64_t max_size, Operation* op,
                                    Type element_dtype, OpBuilder builder,
                                    Value* buffer);

// Same as above, but uses a Value as max_size and check if it is a constant.
LogicalResult CreateInitBufferValue(ArrayRef<int64_t> element_shape,

static mlir::ShapedType ReversePermuteShapedType(
    mlir::ShapedType type, ArrayRef<int64_t> permutation) {
  if (!type.hasRank()) return type;

  auto shape = type.getShape();
  SmallVector<int64_t, 4> new_shape(shape.size());

  for (int i = 0; i < permutation.size(); ++i) {
    int64_t index = permutation[i];
    assert(index < shape.size());
    new_shape[index] = shape[i];
  }