(CMPconst [0] z:((NEG|CNTLZD|RLDICL) x)) && v.Block == z.Block => (CMPconst [0] convertPPC64OpToOpCC(z))
// Note: ADDCCconst only assembles to 1 instruction for int16 constants.
(CMPconst [0] z:(ADDconst [c] x)) && int64(int16(c)) == c && v.Block == z.Block => (CMPconst [0] convertPPC64OpToOpCC(z))
(CMPconst [0] z:(ANDconst [c] x)) && int64(uint16(c)) == c && v.Block == z.Block => (CMPconst [0] convertPPC64OpToOpCC(z))

// https://refspecs.linuxfoundation.org/ELF/zSeries/lzsabi0_zSeries/x1472.html
var S390XDWARFRegisters = map[int16]int16{}

func init() {
	// f assigns dwarfregisters[from:to by step] = (base):((to-from)/step+base)
	f := func(from, step, to, base int16) {
		for r := int16(from); r <= to; r += step {
			S390XDWARFRegisters[r] = (r-from)/step + base
		}
	}
	f(REG_R0, 1, REG_R15, 0)

// Issue 4585: comparisons and hashes process blank
// fields and padding in structs.

package main

import "unsafe"

// T is a structure with padding.
type T struct {
	A     int16
	B     int64
	C     int16
	D     int64
	Dummy [64]byte
}

// U is a structure with a blank field
type U struct {
	A, _, B int
	Dummy   [64]byte
}

// USmall is like U but the frontend will inline comparison

	// memory. Used in open-coded defer return path.
	LoadRegResult func(s *State, f *ssa.Func, t *types.Type, reg int16, n *ir.Name, off int64) *obj.Prog

	// SpillArgReg emits instructions that spill reg to n+off.
	SpillArgReg func(pp *objw.Progs, p *obj.Prog, f *ssa.Func, t *types.Type, reg int16, n *ir.Name, off int64) *obj.Prog

	F_mntfromname [90]int8
	F_mntfromspec [90]int8
	Pad_cgo_0     [2]byte
	Mount_info    [160]byte
}

type Flock_t struct {
	Start  int64
	Len    int64
	Pid    int32
	Type   int16
	Whence int16
}

type Dirent struct {
	Fileno       uint64
	Off          int64
	Reclen       uint16
	Type         uint8
	Namlen       uint8
	X__d_padding [4]uint8
	Name         [256]int8
}

	}
}

func si2c(c <-chan int32) {
	// amd64:"CMPL\t.+, [$]256"
	// s390x:"CLIJ\t[$]12, R[0-9]+, [$]255"
	for x := <-c; x >= 0 && x < 256; x = <-c {
	}
}

func si3c(c <-chan int16) {
	// amd64:"CMPW\t.+, [$]256"
	// s390x:"CLIJ\t[$]12, R[0-9]+, [$]255"
	for x := <-c; x >= 0 && x < 256; x = <-c {
	}
}

func si4c(c <-chan int8) {
	// amd64:"CMPB\t.+, [$]10"

	F_mntfromname [90]int8
	F_mntfromspec [90]int8
	Pad_cgo_0     [2]byte
	Mount_info    [160]byte
}

type Flock_t struct {
	Start  int64
	Len    int64
	Pid    int32
	Type   int16
	Whence int16
}

type Dirent struct {
	Fileno       uint64
	Off          int64
	Reclen       uint16
	Type         uint8
	Namlen       uint8
	X__d_padding [4]uint8
	Name         [256]int8
}

type quad struct { x, y, z, w int }

const (
	cj = 100011
	ci int = 100012
	ci8 int8 = 115
	ci16 int16 = 10016
	ci32 int32 = 100013
	ci64 int64 = 100014
	ci64big int64 = 1<<31
	ci64bigger int64 = 1<<32
	chuge = 1<<100
	cfgood = 2.0
	cfbad = 2.1

	cnj = -2
	cni int = -3
	cni8 int8 = -6
	cni16 int16 = -7
	cni32 int32 = -4
	cni64 int64 = -5
	cni64big int64 = -1<<31
	cni64bigger int64 = -1<<32

		ppc64.ASUBME, ppc64.ASUBZECC, ppc64.ASUBZEVCC, ppc64.ASUBZEV,
		ppc64.ASUBZE:
		return true
	}
	return false
}

func ppc64RegisterNumber(name string, n int16) (int16, bool) {
	switch name {
	case "CR":
		if 0 <= n && n <= 7 {
			return ppc64.REG_CR0 + n, true
		}
	case "A":
		if 0 <= n && n <= 8 {
			return ppc64.REG_A0 + n, true
		}
	case "VS":

// RegEx matches only numeric values
var numericPlaceholderRe = regexp.MustCompile(`\$\d+\$`)

func isNumeric(k reflect.Kind) bool {
	switch k {
	case reflect.Int, reflect.Int8, reflect.Int16, reflect.Int32, reflect.Int64:
		return true
	case reflect.Uint, reflect.Uint8, reflect.Uint16, reflect.Uint32, reflect.Uint64:
		return true
	case reflect.Float32, reflect.Float64:
		return true
	default: