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docs/pt/docs/tutorial/dependencies/index.md
/// check | "Checando" Perceba que você não precisa criar uma classe especial e enviar a dependência para algum outro lugar em que o **FastAPI** a "registre" ou realize qualquer operação similar. Você apenas envia para `Depends` e o **FastAPI** sabe como fazer o resto. /// ## Compartilhando dependências `Annotated`
Registered: Sun Oct 27 07:19:11 UTC 2024 - Last Modified: Sun Oct 06 20:36:54 UTC 2024 - 12.6K bytes - Viewed (0) -
src/archive/zip/register.go
panic("decompressor already registered") } } // RegisterCompressor registers custom compressors for a specified method ID. // The common methods [Store] and [Deflate] are built in. func RegisterCompressor(method uint16, comp Compressor) { if _, dup := compressors.LoadOrStore(method, comp); dup { panic("compressor already registered") } } func compressor(method uint16) Compressor {
Registered: Tue Oct 29 11:13:09 UTC 2024 - Last Modified: Fri Oct 13 18:36:46 UTC 2023 - 3.7K bytes - Viewed (0) -
tensorflow/c/eager/gradients.h
// // More complex gradient functions can use inputs/attrs etc. from the // // forward `op`. // return new AddGradientFunction; // } // // Status RegisterGradients(GradientRegistry* registry) { // return registry->Register("Add", AddRegisterer); // } class GradientFunction { public: virtual absl::Status Compute( AbstractContext* ctx, absl::Span<AbstractTensorHandle* const> grad_outputs,
Registered: Tue Oct 29 12:39:09 UTC 2024 - Last Modified: Sat Oct 12 05:11:17 UTC 2024 - 6.9K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arch.go
register["A0"] = riscv.REG_A0 register["A1"] = riscv.REG_A1 register["A2"] = riscv.REG_A2 register["A3"] = riscv.REG_A3 register["A4"] = riscv.REG_A4 register["A5"] = riscv.REG_A5 register["A6"] = riscv.REG_A6 register["A7"] = riscv.REG_A7 register["S2"] = riscv.REG_S2 register["S3"] = riscv.REG_S3 register["S4"] = riscv.REG_S4 register["S5"] = riscv.REG_S5 register["S6"] = riscv.REG_S6
Registered: Tue Oct 29 11:13:09 UTC 2024 - Last Modified: Thu Oct 24 12:32:56 UTC 2024 - 21.5K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64error.s
VPGATHERQQ Y2, (BP)(X2*2), Y2 // ERROR "mask, index, and destination registers should be distinct" VPGATHERQQ Y2, (BP)(X2*2), Y7 // ERROR "mask, index, and destination registers should be distinct" VPGATHERQQ Y2, (BP)(X7*2), Y2 // ERROR "mask, index, and destination registers should be distinct" VPGATHERQQ Y7, (BP)(X2*2), Y2 // ERROR "mask, index, and destination registers should be distinct"
Registered: Tue Oct 29 11:13:09 UTC 2024 - Last Modified: Wed Jun 14 00:03:57 UTC 2023 - 8.9K bytes - Viewed (0) -
internal/config/subnet/subnet.go
) // Upload given file content (payload) to specified URL func (c Config) Upload(reqURL string, filename string, payload []byte) (string, error) { if !c.Registered() { return "", errors.New("Deployment is not registered with SUBNET. Please register the deployment via 'mc license register ALIAS'") } var body bytes.Buffer writer := multipart.NewWriter(&body) part, e := writer.CreateFormFile("file", filename) if e != nil {
Registered: Sun Oct 27 19:28:09 UTC 2024 - Last Modified: Mon Feb 27 16:35:36 UTC 2023 - 2.9K bytes - Viewed (0) -
tensorflow/c/eager/gradients.cc
} } // namespace absl::Status GradientRegistry::Register( const string& op_name, GradientFunctionFactory gradient_function_factory) { auto iter = registry_.find(op_name); if (iter != registry_.end()) { const string error_msg = "Gradient already exists for op: " + op_name + "."; return errors::AlreadyExists(error_msg); } registry_.insert({op_name, gradient_function_factory}); return absl::OkStatus(); }
Registered: Tue Oct 29 12:39:09 UTC 2024 - Last Modified: Sat Oct 12 05:11:17 UTC 2024 - 19.7K bytes - Viewed (0) -
doc/asm.html
<code>R15</code> points to the stack frame and should typically only be accessed using the virtual registers <code>SP</code> and <code>FP</code>. </p> <p> Load- and store-multiple instructions operate on a range of registers. The range of registers is specified by a start register and an end register. For example, <code>LMG</code> <code>(R9),</code> <code>R5,</code> <code>R7</code> would load
Registered: Tue Oct 29 11:13:09 UTC 2024 - Last Modified: Tue Nov 28 19:15:27 UTC 2023 - 36.3K bytes - Viewed (1) -
src/cmd/asm/internal/asm/asm.go
// both 1st operand and 3rd operand are (Rs, Rs+1) register pair. // And the register pair must be contiguous. if (a[0].Type != obj.TYPE_REGREG) || (a[2].Type != obj.TYPE_REGREG) { p.errorf("invalid addressing modes for 1st or 3rd operand to %s instruction, must be register pair", op) return } // For ARM64 CASP-like instructions, its 2nd destination operand is register pair(Rt, Rt+1) that can
Registered: Tue Oct 29 11:13:09 UTC 2024 - Last Modified: Mon Oct 21 14:11:44 UTC 2024 - 25.5K bytes - Viewed (0) -
cmd/test-utils_test.go
switch apiFunction { case "PostPolicy": // Register PostPolicy handler. bucket.Methods(http.MethodPost).HeadersRegexp("Content-Type", "multipart/form-data*").HandlerFunc(api.PostPolicyBucketHandler) case "HeadObject": // Register HeadObject handler. bucket.Methods("Head").Path("/{object:.+}").HandlerFunc(api.HeadObjectHandler) case "GetObject": // Register GetObject handler.
Registered: Sun Oct 27 19:28:09 UTC 2024 - Last Modified: Tue Oct 01 22:13:18 UTC 2024 - 77K bytes - Viewed (0)