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Results 1 - 10 of 115 for ccc1 (0.05 sec)
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src/test/java/org/codelibs/fess/taglib/FessFunctionsTest.java
value = FessFunctions.maskEmail("aaa bbb ccc"); assertEquals("aaa bbb ccc", value); value = FessFunctions.maskEmail("aaa@bbb.ccc"); assertEquals("******@****.***", value); value = FessFunctions.maskEmail("111.aaa@bbb.ccc"); assertEquals("******@****.***", value); value = FessFunctions.maskEmail("111 aaa+@bbb.ccc 222");
Registered: Wed Jun 12 13:08:18 UTC 2024 - Last Modified: Thu Feb 22 01:37:57 UTC 2024 - 5.9K bytes - Viewed (0) -
pkg/printers/internalversion/printers_test.go
{Cells: []interface{}{"ccc1", "10.1.0.0/16,fd00:1:1::/64", "<unknown>"}}, {Cells: []interface{}{"ccc2", "10.2.0.0/16,fd00:2:1::/64", "<unknown>"}}, }, }, { // Test name, DualStack with node selector, wide. options: printers.GenerateOptions{Wide: true}, expected: []metav1.TableRow{ // Columns: Name, CIDRs, Age. {Cells: []interface{}{"ccc1", "10.1.0.0/16,fd00:1:1::/64", "<unknown>"}},
Registered: Sat Jun 15 01:39:40 UTC 2024 - Last Modified: Tue Jun 11 14:04:15 UTC 2024 - 218.6K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/text/unicode/norm/composition.go
func (rb *reorderBuffer) combineHangul(s, i, k int) { b := rb.rune[:] bn := rb.nrune for ; i < bn; i++ { cccB := b[k-1].ccc cccC := b[i].ccc if cccB == 0 { s = k - 1 } if s != k-1 && cccB >= cccC { // b[i] is blocked by greater-equal cccX below it b[k] = b[i] k++ } else { l := rb.runeAt(s) // also used to compare to hangulBase
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jan 24 13:01:26 UTC 2024 - 14.1K bytes - Viewed (0) -
src/vendor/golang.org/x/text/unicode/norm/composition.go
func (rb *reorderBuffer) combineHangul(s, i, k int) { b := rb.rune[:] bn := rb.nrune for ; i < bn; i++ { cccB := b[k-1].ccc cccC := b[i].ccc if cccB == 0 { s = k - 1 } if s != k-1 && cccB >= cccC { // b[i] is blocked by greater-equal cccX below it b[k] = b[i] k++ } else { l := rb.runeAt(s) // also used to compare to hangulBase
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 26 19:27:51 UTC 2019 - 14.1K bytes - Viewed (0) -
src/test/resources/org/codelibs/core/net/ccc.gif
ccc.gif...
Registered: Wed Jun 12 12:50:12 UTC 2024 - Last Modified: Sun Dec 28 09:01:06 UTC 2014 - 67 bytes - Viewed (0) -
subprojects/core/src/test/groovy/org/gradle/api/internal/NestedConfigureAutoCreateNamedDomainObjectContainerSpec.groovy
Registered: Wed Jun 12 18:38:38 UTC 2024 - Last Modified: Wed Dec 26 05:36:10 UTC 2018 - 3.5K bytes - Viewed (0) -
src/vendor/golang.org/x/crypto/chacha20poly1305/chacha20poly1305_amd64.s
polyMulAVX2 openAVX2Tail128LoopB: ADDQ $16, itr2 chachaQR_AVX2(AA1, BB1, CC1, DD1, TT0) VPALIGNR $4, BB1, BB1, BB1 VPALIGNR $8, CC1, CC1, CC1 VPALIGNR $12, DD1, DD1, DD1 chachaQR_AVX2(AA1, BB1, CC1, DD1, TT0) VPALIGNR $12, BB1, BB1, BB1 VPALIGNR $8, CC1, CC1, CC1 VPALIGNR $4, DD1, DD1, DD1 CMPQ itr2, itr1 JB openAVX2Tail128LoopA CMPQ itr2, $160
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 29 21:28:33 UTC 2023 - 105.6K bytes - Viewed (0) -
src/crypto/internal/nistec/p256_asm_arm64.s
// First reduction step ADDS acc0<<32, acc1, acc1 LSR $32, acc0, t0 MUL acc0, const1, t1 UMULH acc0, const1, acc0 ADCS t0, acc2, acc2 ADCS t1, acc3, acc3 ADC $0, acc0, acc0 // Second reduction step ADDS acc1<<32, acc2, acc2 LSR $32, acc1, t0 MUL acc1, const1, t1 UMULH acc1, const1, acc1 ADCS t0, acc3, acc3 ADCS t1, acc0, acc0 ADC $0, acc1, acc1 // Third reduction step
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 29.7K bytes - Viewed (0) -
src/crypto/internal/nistec/p256_asm_amd64.s
SHLQ $32, acc0 MULQ p256const1<>(SB) SHRQ $32, t1 ADDQ acc0, acc1 ADCQ t1, acc2 ADCQ AX, acc3 ADCQ $0, DX MOVQ DX, acc0 // Second reduction step MOVQ acc1, AX MOVQ acc1, t1 SHLQ $32, acc1 MULQ p256const1<>(SB) SHRQ $32, t1 ADDQ acc1, acc2 ADCQ t1, acc3 ADCQ AX, acc0 ADCQ $0, DX MOVQ DX, acc1 // Third reduction step MOVQ acc2, AX MOVQ acc2, t1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 39.8K bytes - Viewed (0) -
src/crypto/aes/gcm_amd64.s
MOVOU (16*15)(pTbl), ACCM MOVOU ACC0, ACC1 PCLMULQDQ $0x00, B0, ACC0 PCLMULQDQ $0x11, B0, ACC1 PSHUFD $78, B0, T0 PXOR B0, T0 PCLMULQDQ $0x00, T0, ACCM PXOR ACC0, ACCM PXOR ACC1, ACCM MOVOU ACCM, T0 PSRLDQ $8, ACCM PSLLDQ $8, T0 PXOR ACCM, ACC1 PXOR T0, ACC0 reduceRound(ACC0) reduceRound(ACC0) PXOR ACC1, ACC0 MOVOU (0*16)(SP), B0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 23.4K bytes - Viewed (0)