//
	CLWSP	20(X5), X10				// ERROR "rs2 must be SP/X2"
	CLWSP	20(SP), X0				// ERROR "cannot use register X0"
	CLWSP	20(SP), F10				// ERROR "expected integer register in rd position"
	CLWSP	22(SP), X10				// ERROR "must be a multiple of 4"
	CLDSP	24(X5), X10				// ERROR "rs2 must be SP/X2"
	CLDSP	24(SP), X0				// ERROR "cannot use register X0"
	CLDSP	24(SP), F10				// ERROR "expected integer register in rd position"

					},

					// valueSetIndex(v ref, i int, x ref)
					"syscall/js.valueSetIndex": (sp) => {
						sp >>>= 0;
						Reflect.set(loadValue(sp + 8), getInt64(sp + 16), loadValue(sp + 24));
					},

					// func valueCall(v ref, m string, args []ref) (ref, bool)
					"syscall/js.valueCall": (sp) => {
						sp >>>= 0;
						try {
							const v = loadValue(sp + 8);

	MOVOA	(AX), X1	// MOVO (AX), X1

// Tests for SP indexed addresses.
	MOVQ	foo(SP)(AX*1), BX		// 488b1c04
	MOVQ	foo+32(SP)(CX*2), DX		// 488b544c20
	MOVQ	foo+32323(SP)(R8*4), R9		// 4e8b8c84437e0000
	MOVL	foo(SP)(SI*8), DI		// 8b3cf4
	MOVL	foo+32(SP)(R10*1), R11		// 468b5c1420
	MOVL	foo+32323(SP)(R12*2), R13	// 468bac64437e0000
	MOVW	foo(SP)(AX*4), R8		// 66448b0484
	MOVW	foo+32(SP)(R9*8), CX		// 66428b4ccc20

	MOVD	R1, n-8(SP)           // e310f0100024
	MOVW	R2, n-8(SP)           // 5020f010
	MOVH	R3, n-8(SP)           // 4030f010
	MOVB	R4, n-8(SP)           // 4240f010
	MOVWZ	R5, n-8(SP)           // 5050f010
	MOVHZ	R6, n-8(SP)           // 4060f010
	MOVBZ	R7, n-8(SP)           // 4270f010
	MOVDBR	R8, n-8(SP)           // e380f010002f
	MOVWBR	R9, n-8(SP)           // e390f010003e

	CALL	foo(SB)
//	CALL	(AX*4) // TODO: This line is silently dropped on the floor!
	CALL	foo+4(SB)(AX*4)
	CALL	*4(SP) // CALL 4(SP)
	CALL	*(AX) // CALL (AX)
	CALL	*(SP) // CALL (SP)
//	CALL	*(AX*4) // TODO: This line is silently dropped on the floor!
	CALL	*(AX)(AX*4) // CALL (AX)(AX*4)
	CALL	4(SP)
	CALL	(AX)
	CALL	(SP)
//	CALL	(AX*4) // TODO: This line is silently dropped on the floor!
	JCS	2(PC)
	JMP	(AX)(AX*4)

	{"(DX)", "(DX)"},
	{"(R9)", "(R9)"},
	{"(R9)(BX*8)", "(R9)(BX*8)"},
	{"(SI)", "(SI)"},
	{"(SI)(BX*1)", "(SI)(BX*1)"},
	{"(SI)(DX*1)", "(SI)(DX*1)"},
	{"(SP)", "(SP)"},
	{"(SP)(AX*4)", "(SP)(AX*4)"},
	{"32(SP)(BX*2)", "32(SP)(BX*2)"},
	{"32323(SP)(R8*4)", "32323(SP)(R8*4)"},
	{"+3(PC)", "3(PC)"},
	{"-1(DI)(BX*1)", "-1(DI)(BX*1)"},
	{"-3(PC)", "-3(PC)"},
	{"-64(SI)(BX*1)", "-64(SI)(BX*1)"},

R11, 328(SP) MOVQ R12, 336(SP) MOVQ R13, 344(SP) MOVQ 64(SP), R14 MOVQ 72(SP), R15 MOVQ 80(SP), DI MOVQ 88(SP), SI CALL p256MulInternal(SB) MOVQ R10, 224(SP) MOVQ R11, 232(SP) MOVQ R12, 240(SP) MOVQ R13, 248(SP) MOVQ 288(SP), R10 MOVQ 296(SP), R11 MOVQ 304(SP), R12 MOVQ 312(SP), R13 CALL p256MulInternal(SB) MOVQ 128(SP), R14 MOVQ 136(SP), R15 MOVQ 144(SP), DI MOVQ 152(SP), SI CALL p256MulInternal(SB) MOVQ R10, 256(SP) MOVQ R11, 264(SP) MOVQ R12, 272(SP) MOVQ R13, 280(SP) MOVQ 32(SP), R14 MOVQ 40(SP),...

the name prefix distinguishes
references to the virtual stack pointer from references to the architectural
<code>SP</code> register.
That is, <code>x-8(SP)</code> and <code>-8(SP)</code>
are different memory locations:
the first refers to the virtual stack pointer pseudo-register,
while the second refers to the
hardware's <code>SP</code> register.
</p>

<p>

	VPGATHERQQ Y8, 0(Y9*4), Y10             // c422bd91148d00000000
	// AVX2GATHER: test SP/BP base with different displacements.
	VPGATHERQQ X0, (SP)(X1*1), X2           // c4e2f991140c
	VPGATHERQQ X0, 16(SP)(X1*1), X2         // c4e2f991540c10
	VPGATHERQQ X0, 512(SP)(X1*1), X2        // c4e2f991940c00020000
	VPGATHERQQ X0, (R12)(X1*1), X2          // c4c2f991140c

 * <pre>
 * # SP Entity ID (Audience URI in IdP)
 * saml.sp.entityid=https://your-fess-server.example.com/sso/metadata
 *
 * # Assertion Consumer Service URL
 * saml.sp.assertion_consumer_service.url=https://your-fess-server.example.com/sso/
 *
 * # Single Logout Service URL
 * saml.sp.single_logout_service.url=https://your-fess-server.example.com/sso/logout
 * </pre>
 *