LVXL (R3)(R4), V1               // 7c241ace
	LVXL (R3)(R0), V1               // 7c201ace
	LVXL (R3), V1                   // 7c201ace
	LVSL (R3)(R4), V1               // 7c24180c
	LVSL (R3)(R0), V1               // 7c20180c
	LVSL (R3), V1                   // 7c20180c
	LVSR (R3)(R4), V1               // 7c24184c
	LVSR (R3)(R0), V1               // 7c20184c
	LVSR (R3), V1                   // 7c20184c

MOVD $0x20, R9 MOVD $0x30, R10 LXVD2X (XIP)(R0), VXL // load Xi LXVD2X (HTBL)(R8), VHL // load pre-computed table MOVD $0x40, R8 LXVD2X (HTBL)(R9), VH MOVD $0x50, R9 LXVD2X (HTBL)(R10), VHH MOVD $0x60, R10 LXVD2X (HTBL)(R0), VXC2 #ifdef GOARCH_ppc64le LVSL (R0)(R0), LEMASK VSPLTISB $0x07, T0 VXOR LEMASK, T0, LEMASK VPERM XL, XL, LEMASK, XL #endif VXOR ZERO, ZERO, ZERO CMPU LEN, $64 BGE gcm_ghash_p8_4x LXVD2X (INP)(R0), VIN ADD $16, INP, INP SUBCCC $16, LEN, LEN #ifdef GOARCH_ppc64le VPERM IN, IN, LEMASK,...