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Results 1 - 2 of 2 for CMPL (0.03 sec)

  1. src/cmd/asm/internal/asm/testdata/amd64dynlinkerror.s

    // See issue 43661.
    
    TEXT ·a1(SB), 0, $0-0
    	CMPL runtime·writeBarrier(SB), $0
    	MOVL $0, R15
    	RET
    TEXT ·a2(SB), 0, $0-0
    	CMPL runtime·writeBarrier(SB), $0
    	MOVQ $0, R15
    	RET
    TEXT ·a3(SB), 0, $0-0
    	CMPL runtime·writeBarrier(SB), $0
    	XORL R15, R15
    	RET
    TEXT ·a4(SB), 0, $0-0
    	CMPL runtime·writeBarrier(SB), $0
    	XORQ R15, R15
    	RET
    TEXT ·a5(SB), 0, $0-0
    	CMPL runtime·writeBarrier(SB), $0
    	XORL R15, R15
    	RET
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Mar 15 20:45:41 UTC 2023
    - 4.8K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/amd64enc.s

    	CMPL (BX), DX                           // 3913
    	CMPL (BX), R11                          // 44391b
    	CMPL (R11), DX                          // 413913
    	CMPL (R11), R11                         // 45391b
    	CMPL DX, DX                             // 39d2 or 3bd2
    	CMPL DX, R11                            // 4439da or 413bd3
    	CMPL R11, DX                            // 4139d3 or 443bda
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Oct 08 21:38:44 UTC 2021
    - 581.9K bytes
    - Viewed (1)
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