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Results 1 - 10 of 13 for ASUBW (0.07 sec)
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src/cmd/internal/obj/loong64/a.out.go
AOR AREM AREMU ARFE ASC ASCV ASGT ASGTU ASLL ASQRTD ASQRTF ASRA ASRL AROTR ASUB ASUBD ASUBF ASUBU ASUBW ADBAR ASYSCALL ATEQ ATNE AWORD AXOR AMASKEQZ AMASKNEZ // 64-bit AMOVV AMOVVL AMOVVR ASLLV ASRAV ASRLV AROTRV
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 5.7K bytes - Viewed (0) -
src/cmd/internal/obj/mips/a.out.go
AOR AREM AREMU ARFE AROTR AROTRV ASC ASCV ASEB ASEH ASGT ASGTU ASLL ASQRTD ASQRTF ASRA ASRL ASUB ASUBD ASUBF ASUBU ASUBW ASYNC ASYSCALL ATEQ ATLBP ATLBR ATLBWI ATLBWR ATNE AWORD AWSBH AXOR /* 64-bit */ AMOVV AMOVVL AMOVVR ASLLV ASRAV ASRLV ADIVV
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 7.6K bytes - Viewed (0) -
src/cmd/internal/obj/x86/aenum.go
ASTAC ASTC ASTD ASTI ASTMXCSR ASTOSB ASTOSL ASTOSQ ASTOSW ASTRL ASTRQ ASTRW ASUBB ASUBL ASUBPD ASUBPS ASUBQ ASUBSD ASUBSS ASUBW ASWAPGS ASYSCALL ASYSENTER ASYSENTER64 ASYSEXIT ASYSEXIT64 ASYSRET ATESTB ATESTL ATESTQ ATESTW ATPAUSE ATZCNTL ATZCNTQ ATZCNTW AUCOMISD AUCOMISS
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 16.3K bytes - Viewed (0) -
src/cmd/internal/obj/s390x/a.out.go
AADDE AADDW ADIVW ADIVWU ADIVD ADIVDU AMODW AMODWU AMODD AMODDU AMULLW AMULLD AMULHD AMULHDU AMLGR ASUB ASUBC ASUBV ASUBE ASUBW ANEG ANEGW // integer moves AMOVWBR AMOVB AMOVBZ AMOVH AMOVHBR AMOVHZ AMOVW AMOVWZ AMOVD AMOVDBR // conditional moves AMOVDEQ AMOVDGE
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Sep 05 16:41:03 UTC 2023 - 12.4K bytes - Viewed (0) -
src/cmd/internal/obj/riscv/cpu.go
// 2.7: Memory Ordering Instructions AFENCE AFENCETSO APAUSE // 5.2: Integer Computational Instructions (RV64I) AADDIW ASLLIW ASRLIW ASRAIW AADDW ASLLW ASRLW ASUBW ASRAW // 5.3: Load and Store Instructions (RV64I) ALD ASD // 7.1: Multiplication Operations AMUL AMULH AMULHU AMULHSU AMULW ADIV ADIVU AREM AREMU
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 20 14:19:33 UTC 2024 - 13.1K bytes - Viewed (0) -
src/cmd/internal/obj/riscv/inst.go
return &inst{0x13, 0x5, 0x0, 0, 0x0} case ASRLIW: return &inst{0x1b, 0x5, 0x0, 0, 0x0} case ASRLW: return &inst{0x3b, 0x5, 0x0, 0, 0x0} case ASUB: return &inst{0x33, 0x0, 0x0, 1024, 0x20} case ASUBW: return &inst{0x3b, 0x0, 0x0, 1024, 0x20} case ASW: return &inst{0x23, 0x2, 0x0, 0, 0x0} case AWFI: return &inst{0x73, 0x0, 0x5, 261, 0x8} case AXNOR: return &inst{0x33, 0x4, 0x0, 1024, 0x20}
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 20 14:19:33 UTC 2024 - 13.9K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/a.out.go
ASTLRH ASTLRW ASTLXP ASTLXPW ASTLXR ASTLXRB ASTLXRH ASTLXRW ASTP ASTPW ASTXP ASTXPW ASTXR ASTXRB ASTXRH ASTXRW ASUB ASUBS ASUBSW ASUBW ASVC ASWPAB ASWPAD ASWPAH ASWPALB ASWPALD ASWPALH ASWPALW ASWPAW ASWPB ASWPD ASWPH ASWPLB ASWPLD ASWPLH ASWPLW ASWPW ASXTB ASXTBW
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Oct 18 17:56:30 UTC 2023 - 18.1K bytes - Viewed (0) -
src/cmd/internal/obj/riscv/obj.go
// Expand binary instructions to ternary ones. if p.Reg == obj.REG_NONE { switch p.As { case AADDI, ASLTI, ASLTIU, AANDI, AORI, AXORI, ASLLI, ASRLI, ASRAI, AADDIW, ASLLIW, ASRLIW, ASRAIW, AADDW, ASUBW, ASLLW, ASRLW, ASRAW, AADD, AAND, AOR, AXOR, ASLL, ASRL, ASUB, ASRA, AMUL, AMULH, AMULHU, AMULHSU, AMULW, ADIV, ADIVU, ADIVW, ADIVUW, AREM, AREMU, AREMW, AREMUW,
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sun Apr 07 03:32:27 UTC 2024 - 77K bytes - Viewed (0) -
src/cmd/internal/obj/mips/obj0.go
ASLL, ASRA, ASRL, ASLLV, ASRAV, ASRLV, ASUB, ASUBU, ASUBV, ASUBVU, AXOR, AADDD, AADDF, AADDW, ASUBD, ASUBF, ASUBW, AMULF, AMULD, AMULW, ADIVF, ADIVD, ADIVW: if p.Reg == 0 { if p.To.Type == obj.TYPE_REG { p.Reg = p.To.Reg } //if(p->reg == NREG)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 19:28:53 UTC 2023 - 30.6K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/asm7.go
func isADDop(op obj.As) bool { switch op { case AADD, AADDS, ASUB, ASUBS, ACMN, ACMP: return true } return false } func isADDWop(op obj.As) bool { switch op { case AADDW, AADDSW, ASUBW, ASUBSW, ACMNW, ACMPW: return true } return false } func isADDSop(op obj.As) bool { switch op { case AADDS, AADDSW, ASUBS, ASUBSW: return true } return false }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 201.1K bytes - Viewed (0)