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Results 51 - 60 of 300 for mask8 (0.04 sec)
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src/runtime/os_openbsd.go
// //go:nosplit func setSignalstackSP(s *stackt, sp uintptr) { s.ss_sp = sp } //go:nosplit //go:nowritebarrierrec func sigaddset(mask *sigset, i int) { *mask |= 1 << (uint32(i) - 1) } func sigdelset(mask *sigset, i int) { *mask &^= 1 << (uint32(i) - 1) } //go:nosplit func (c *sigctxt) fixsigcode(sig uint32) { } func setProcessCPUProfiler(hz int32) {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 19:53:03 UTC 2024 - 6.2K bytes - Viewed (0) -
cmd/listen-notification-handlers.go
} pattern := event.NewPattern(prefix, suffix) var eventNames []event.Name var mask pubsub.Mask for _, s := range values[peerRESTListenEvents] { eventName, err := event.ParseName(s) if err != nil { writeErrorResponse(ctx, w, toAPIError(ctx, err), r.URL) return } mask.MergeMaskable(eventName) eventNames = append(eventNames, eventName) } if bucketName != "" {
Registered: Sun Jun 16 00:44:34 UTC 2024 - Last Modified: Fri May 24 23:05:23 UTC 2024 - 6K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm9.go
v = 0 } else if v > 32 { v = 32 } var mask [2]uint8 switch p.As { case AROTLW: mask[0], mask[1] = 0, 31 case ASRW, ASRWCC: mask[0], mask[1] = uint8(v), 31 v = 32 - v default: mask[0], mask[1] = 0, uint8(31-v) } o1 = OP_RLW(OP_RLWINM, uint32(p.To.Reg), uint32(r), uint32(v), uint32(mask[0]), uint32(mask[1])) if p.As == ASLWCC || p.As == ASRWCC {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 13:55:28 UTC 2024 - 156.1K bytes - Viewed (0) -
src/runtime/race.go
//go:linkname abigen_sync_atomic_OrInt64 sync/atomic.OrInt64 func abigen_sync_atomic_OrInt64(addr *int64, mask int64) (old int64) //go:linkname abigen_sync_atomic_OrUint64 sync/atomic.OrUint64 func abigen_sync_atomic_OrUint64(addr *uint64, mask uint64) (old uint64) //go:linkname abigen_sync_atomic_OrUintptr sync/atomic.OrUintptr func abigen_sync_atomic_OrUintptr(addr *uintptr, mask uintptr) (old uintptr)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 18:37:29 UTC 2024 - 20.4K bytes - Viewed (0) -
android/guava/src/com/google/common/collect/CompactLinkedHashMap.java
setPredecessor(succ, pred); } } @Override void insertEntry( int entryIndex, @ParametricNullness K key, @ParametricNullness V value, int hash, int mask) { super.insertEntry(entryIndex, key, value, hash, mask); setSucceeds(lastEntry, entryIndex); setSucceeds(entryIndex, ENDPOINT); } @Override void accessEntry(int index) { if (accessOrder) {
Registered: Wed Jun 12 16:38:11 UTC 2024 - Last Modified: Mon Apr 01 16:15:01 UTC 2024 - 8.5K bytes - Viewed (0) -
src/crypto/sha1/sha1.go
separator := byte(0x80) // gets reset to 0x00 once used for i := byte(0); i < chunk; i++ { mask := byte(int8(i-nx) >> 7) // 0x00 after the end of data // if we reached the end of the data, replace with 0x80 or 0x00 d.x[i] = (^mask & separator) | (mask & d.x[i]) // zero the separator once used separator &= mask if i >= 56 { // we might have to write the length here if all fit in one block
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 16 16:50:58 UTC 2024 - 5.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64latelower.rules
// The upper bits of the smaller than register values is undefined. Take advantage of that. (AND <t> x:(MOVDconst [m]) n) && t.Size() <= 2 => (ANDconst [int64(int16(m))] n) // Convert simple bit masks to an equivalent rldic[lr] if possible. (AND x:(MOVDconst [m]) n) && isPPC64ValidShiftMask(m) => (RLDICL [encodePPC64RotateMask(0,m,64)] n)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 3.8K bytes - Viewed (0) -
src/cmd/compile/internal/inline/inlheur/scoring.go
} func adjustScore(typ scoreAdjustTyp, score int, mask scoreAdjustTyp) (int, scoreAdjustTyp) { if isMust(typ) { if mask&typ != 0 { return score, mask } may := mustToMay(typ) if mask&may != 0 { // promote may to must, so undo may score -= adjValue(may) mask &^= may } } else if isMay(typ) { must := mayToMust(typ) if mask&(must|typ) != 0 { return score, mask } }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 27 20:42:52 UTC 2024 - 24.2K bytes - Viewed (0) -
src/crypto/aes/asm_ppc64x.s
ADD $16, OUTENC, OUTENC ADD $-16, OUTDEC, OUTDEC VSPLTISB $8, KEY // vspltisb 3,8 MOVD CNT, CTR // mtctr 7 VSUBUBM MASK, KEY, MASK // vsububm 5,5,3 loop192: VPERM IN1, IN1, MASK, KEY // vperm 3,2,2,5 VSLDOI $12, ZERO, IN0, TMP // vsldoi 6,0,1,12 VCIPHERLAST KEY, RCON, KEY // vcipherlast 3,3,4 VXOR IN0, TMP, IN0 // vxor 1,1,6
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 20 18:05:32 UTC 2024 - 18.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/python/tf_tfl_flatbuffer_helpers.cc
ReducedPrecisionSupport mask = ReducedPrecisionSupport::None; if (toco_flags.quantize_to_float16()) { mask |= ReducedPrecisionSupport::Float16Inference; } if (toco_flags.allow_bfloat16()) { mask |= ReducedPrecisionSupport::Bfloat16Inference; } if (toco_flags.accumulation_type() == toco::IODataType::FLOAT16) { mask |= ReducedPrecisionSupport::Float16Accumulation;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sun May 12 12:39:37 UTC 2024 - 17.3K bytes - Viewed (0)