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tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/lift_quantizable_spots_as_functions.mlir
%5 = stablehlo.convolution(%arg0, %0) dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f], window = {pad = [[1, 1], [1, 1]]} {batch_group_count = 1 : i64, feature_group_count = 1 : i64} : (tensor<?x28x28x1xf32>, tensor<3x3x1x16xf32>) -> tensor<?x28x28x16xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 10 04:07:09 UTC 2024 - 49.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/prepare_quantize/prepare_quantize.mlir
// CHECK: %[[dq2:.*]] = "quantfork.dcast"(%[[q2]]) // CHECK: stablehlo.convert %[[dq2]] %0 = "quantfork.stats"(%arg0) {bitsNum = 8 : i64, layerStats = dense<[-0.999415695, 0.99998933]> : tensor<2xf32>, narrowRange = false} : (tensor<2x3xf32>) -> tensor<2x3xf32> %1 = "quantfork.stats"(%0) {bitsNum = 8 : i64, layerStats = dense<[-2.0, 2.0]> : tensor<2xf32>, narrowRange = false} : (tensor<2x3xf32>) -> tensor<2x3xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Feb 22 19:52:06 UTC 2024 - 8.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/ir/tfl_ops.td
appended at the end). }]; let arguments = (ins TFL_TensorOf<[I32, I64]>:$indices, TFL_I32Tensor:$depth, TFL_TensorOf<[F32, I32, I64, I1, I8, UI8]>:$on_value, TFL_TensorOf<[F32, I32, I64, I1, I8, UI8]>:$off_value, I32Attr:$axis ); let results = (outs TFL_TensorOf<[F32, I32, I64, I1, I8, UI8]>:$output ); let hasOptions = 1; }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 19:09:08 UTC 2024 - 186K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/common/lift_as_function_call_test.cc
%2 = stablehlo.convolution(%1, %0) dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f], window = {pad = [[1, 1], [1, 1]]} {batch_group_count = 1 : i64, feature_group_count = 1 : i64} : (tensor<1x3x3x4xf32>, tensor<3x3x4x4xf32>) -> tensor<1x3x3x4xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 10 04:07:09 UTC 2024 - 26.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/convert_to_legacy_compile_and_replicate_attributes.mlir
%outputs_5, %control_6 = tf_executor.island(%control_4) wraps "tf.TPUCompilationResult"()...
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 22:03:30 UTC 2024 - 6.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/insert_weight_param.mlir
%0 = stablehlo.convolution(%arg0, %arg1) dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f], window = {pad = [[0, 1], [1, 1]]} {batch_group_count = 1 : i64, feature_group_count = 1 : i64} : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<1x3x4x2xf32> return %0 : tensor<1x3x4x2xf32> } // CHECK: func private @composite_conv_fn // CHECK: %[[CONV:.+]] = stablehlo.convolution
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 09 05:56:10 UTC 2024 - 22K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/optimize_layout.mlir
// CHECK: %[[REDUCE:.*]] = "stablehlo.reduce_window"(%[[INPUT]], %[[PAD_VAL]]) // CHECK: <{window_dimensions = array<i64: 1, 3, 3, 1>, // CHECK: window_strides = array<i64: 1, 2, 2, 1>}> ({ // CHECK: ^bb0(%[[ARG0:.*]]: tensor<f32>, %[[ARG1:.*]]: tensor<f32>): // CHECK: %[[MAX:.*]] = stablehlo.maximum %[[ARG0]], %[[ARG1]] : tensor<f32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 21:59:06 UTC 2024 - 2.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_bridge_v1/end_to_end.mlir
%outputs_3, %control_4 = tf_executor.island wraps "tf.Placeholder"() {device = "", dtype = "tfdtype$DT_FLOAT",...
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Mar 13 21:23:47 UTC 2024 - 3.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/convert_tf_quant_types_test.cc
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Mar 05 09:05:02 UTC 2024 - 4.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir
// CHECK: arith.index_cast {{.*}} : index to i64 // CHECK: arith.cmpi eq, {{.*}} : i64 // CHECK: arith.addi {{.*}} : i64 // CHECK: tensor.dim {{.*}} : tensor<4xi32> // CHECK: arith.index_cast {{.*}} : index to i64 // CHECK: select {{.*}} : i64 // CHECK: arith.index_cast {{.*}} : i64 to index // CHECK: arith.index_cast {{.*}} : i64 to index // CHECK: tensor.from_elements {{.*}} : tensor<1xindex>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon May 06 18:46:23 UTC 2024 - 335.5K bytes - Viewed (0)