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Results 21 - 30 of 155 for i64_ (0.07 sec)
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tensorflow/compiler/mlir/tensorflow/tests/canonicalize.mlir
%2 = "tf.Shape"(%arg0) : (tensor<?x1x2x?xf32>) -> tensor<4xi32> %3 = "tf.StridedSlice"(%2, %1, %0, %1) {begin_mask = 0 : i64, ellipsis_mask = 0 : i64, end_mask = 0 : i64, new_axis_mask = 0 : i64, shrink_axis_mask = 0 : i64} : (tensor<4xi32>, tensor<1xi32>, tensor<1xi32>, tensor<1xi32>) -> tensor<2xi32> func.return %3 : tensor<2xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 09 22:07:10 UTC 2024 - 132.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/hoist_invariant_ops.mlir
"tf.BatchFunction"(%cst) <{allowed_batch_sizes = [1], batch_timeout_micros = 5000 : i64, batching_queue = "", container = "", enable_large_batch_splitting = true, f = @_batched, low_priority_allowed_batch_sizes = [], low_priority_batch_timeout_micros = 0 : i64, low_priority_max_batch_size = 0 : i64, low_priority_max_enqueued_batches = 0 : i64, max_batch_size = 1 : i64, max_enqueued_batches = 1 : i64, num_batch_threads = 1 : i64, operandSegmentSizes = array<i32: 1, 0>, shared_name = "batch_function___inf...
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Apr 01 23:54:14 UTC 2024 - 18.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/ifrt/rewrite_cluster_to_ifrt_call.mlir
// CHECK-SAME: {program_id = [[PROGRAM_ID:.*]] : i64, variable_arg_indices = [] // CHECK-SAME: (tensor<1x3xf32>, tensor<3x1xf32>) -> tensor<1x1xf32> // CHECK-NEXT: %1 = "tf.Identity"(%arg1) {device = ""} : (tensor<1x3xf32>) -> tensor<1x3xf32> // CHECK-NEXT: %2 = "tf.IfrtCall"(%1, %arg0) // CHECK-SAME: {program_id = [[PROGRAM_ID]] : i64, variable_arg_indices = []
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Feb 17 07:28:40 UTC 2024 - 9K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/bridge/optimize.mlir
dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f], window = {stride = [1, 1], pad = [[0, 0], [0, 0]], lhs_dilate = [1, 1], rhs_dilate = [1, 1]} {batch_group_count = 1 : i64, feature_group_count = 1 : i64} : (tensor<?x3x2x1xi8>, tensor<2x1x1x1xi8>) -> tensor<?x2x2x1xi32> %1 = chlo.broadcast_add %0, %zp_offset : ( tensor<?x2x2x1xi32>, tensor<?x2x2x1xi32>) -> tensor<?x2x2x1xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Feb 24 02:26:47 UTC 2024 - 10.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/fuse_mhlo_convolution.mlir
%filter = mhlo.constant dense<[[[[1.0, 2.0], [3.0, 4.0], [5.0, 6.0]]]]> : tensor<1x1x3x2xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Apr 06 15:32:52 UTC 2024 - 4.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_validate_inputs.mlir
// expected-error @+1 {{'tf.TPUPartitionedInput' op TF2XLA TPU bridge input check: number of inputs inconsistent. num_cores_per_replica=2 no. of inputs=3}} %pi, %c0 = tf_executor.island wraps "tf.TPUPartitionedInput"(%arg0, %arg1, %arg1) {index = 1 : i64} : (tensor<i32>, tensor<i32>, tensor<i32>) -> tensor<i32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 07 06:51:01 UTC 2024 - 15.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_tail_with_tobool_op.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Mar 13 21:23:47 UTC 2024 - 2.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_sharding_identification.mlir
// CHECK-SAME: ->{{.*}}mhlo.sharding = "\04\05\06"{{.*}}mhlo.sharding = "\01\02\03" func.func @func(%arg0: tensor<*xi32> {tf.aliasing_output = 1 : i64}, %arg1: tensor<*xi32> {tf.aliasing_output = 0 : i64}) -> (tensor<*xi32>, tensor<*xi32>) { %0 = "tf.XlaSharding"(%arg0) { _XlaSharding = "\01\02\03"} : (tensor<*xi32>) -> tensor<*xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Feb 20 19:07:52 UTC 2024 - 47.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/add_dump_tensor_op_stablehlo.mlir
%3 = "tf.XlaCallModule"(%2, %1, %0) <{Sout = [#tf_type.shape<?x2>], module = "", version = 9 : i64}> {_entry_function = @composite_dot_general_with_bias_and...
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Mar 22 22:55:22 UTC 2024 - 18K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/defer_activation_transpose.mlir
%3 = stablehlo.maximum %arg1, %arg2 : tensor<f32> stablehlo.return %3 : tensor<f32> }) { window_dimensions = array<i64: 1, 1, 2, 2>, window_strides = array<i64: 1, 1, 2, 2>, base_dilations = array<i64: 1, 1, 2, 2>, window_dilations = array<i64: 1, 1, 2, 2> } : (tensor<1x4x16x16xf32>, tensor<f32>) -> tensor<1x4x15x15xf32> return %2 : tensor<1x4x15x15xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 18 20:32:46 UTC 2024 - 14.6K bytes - Viewed (0)