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Results 21 - 30 of 101 for conv2 (0.04 sec)

  1. src/cmd/compile/internal/walk/builtin.go

    		return mkcall("countrunes", n.Type(), init, typecheck.Conv(n.X.(*ir.ConvExpr).X, types.Types[types.TSTRING]))
    	}
    	if isByteCount(n) {
    		conv := n.X.(*ir.ConvExpr)
    		walkStmtList(conv.Init())
    		init.Append(ir.TakeInit(conv)...)
    		_, len := backingArrayPtrLen(cheapExpr(conv.X, init))
    		return len
    	}
    	if isChanLenCap(n) {
    		name := "chanlen"
    		if n.Op() == ir.OCAP {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 08 22:35:22 UTC 2024
    - 31.2K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/quantization/tensorflow/tests/lift_quantizable_spots_as_functions.mlir

      %0 = "tf.Conv2D"(%arg0, %arg1) {
        data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [],
        padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true
      } : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<*xf32>
      %1 = "tf.Relu6"(%0) {device = ""} : (tensor<*xf32>) -> tensor<*xf32>
    
    
      %3 = "tf.Conv2D"(%arg0, %arg1) {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri May 10 04:07:09 UTC 2024
    - 26.5K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/quantization/stablehlo/tests/pipelines/process_nchw_tensor.mlir

    // CHECK: %[[CONV:.+]] = stablehlo.convolution(%[[TRANSPOSE_0]], %[[CONST]]) dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f], window = {pad = {{\[\[}}1, 1], [1, 1]]} {batch_group_count = 1 : i64, feature_group_count = 1 : i64} : (tensor<1x4x4x8xf32>, tensor<3x3x8x8xf32>) -> tensor<1x4x4x8xf32>
    // CHECK: %[[TRANSPOSE_1:.+]] = stablehlo.transpose %[[CONV]], dims = [0, 3, 1, 2] : (tensor<1x4x4x8xf32>) -> tensor<1x8x4x4xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 18 20:32:46 UTC 2024
    - 12.6K bytes
    - Viewed (0)
  4. platforms/software/dependency-management/src/main/java/org/gradle/internal/component/external/model/ivy/IvyConfigurationHelper.java

                    return true;
                }
                if (moduleConfiguration.equals("*")) {
                    boolean include = true;
                    for (String conf2 : dependencyConfigurations) {
                        if (conf2.startsWith("!") && conf2.substring(1).equals(configName)) {
                            include = false;
                            break;
                        }
                    }
    Registered: Wed Jun 12 18:38:38 UTC 2024
    - Last Modified: Tue Mar 19 19:13:04 UTC 2024
    - 5.1K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/lift_quantizable_spots_as_functions.mlir

    // CHECK: }
    
    // CHECK-LABEL: private @composite_conv_with_bias_dynamic_fn_1
    // CHECK: %[[CONV:.*]] = stablehlo.convolution(%arg0, %arg1)
    // CHECK: %[[SHAPE_OF:.*]] = shape.shape_of %[[CONV]]
    // CHECK: %[[DYNAMIC_BROADCAST_IN_DIM:.*]] = stablehlo.dynamic_broadcast_in_dim %arg2, %[[SHAPE_OF]]
    // CHECK: %[[ADD:.*]] = stablehlo.add %[[CONV]], %[[DYNAMIC_BROADCAST_IN_DIM]]
    // CHECK: return %[[ADD]] : tensor<?x28x28x16xf32>
    // CHECK: }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri May 10 04:07:09 UTC 2024
    - 49.8K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/lite/experimental/tac/transforms/device_transform_patterns.cc

                          weight_new_shape, &rewriter);
    
      // Replace the fc with conv.
      // The output would be [1, 1, width, output].
      auto conv_output_type = RankedTensorType::get({1, 1, width, output_size},
                                                    output_type.getElementType());
      auto conv = rewriter.create<TFL::Conv2DOp>(
          fc_op.getLoc(), conv_output_type, reshaped_input, reshaped_weight,
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 25.4K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/quantization/tensorflow/tests/fallback_to_flex_ops_default.mlir

      %cst_0 = "tf.Const"() {value = dense<-1.000000e+00> : tensor<f32>} : () -> tensor<f32>
      %cst_1 = "tf.Const"() {value = dense<1.000000e+00> : tensor<f32>} : () -> tensor<f32>
      %0 = "tf.Conv2D"(%arg0, %cst) {data_format = "NHWC", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 1, 1]} : (tensor<1x3x4x3xf32>, tensor<1x1x3x2xf32>) -> tensor<1x3x4x2xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 13.4K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/tensorflow/transforms/fused_kernel_matcher.cc

      // attribute which is shared.
      bool AreFuseCompatible(Conv2DOp conv, BiasAddOp bias_add,
                             PatternRewriter &rewriter) const override {
        // Verify that the data formats match and are valid for fusion.
        if (conv.getDataFormat() != bias_add.getDataFormat()) {
          (void)rewriter.notifyMatchFailure(conv, [&](Diagnostic &diag) {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 14.9K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/lite/tests/end2end/fake_quant_per_channel.pbtxt

        key: "narrow_range"
        value {
          b: true
        }
      }
      attr {
        key: "num_bits"
        value {
          i: 8
        }
      }
    }
    node {
      name: "BoxPredictor_4/ClassPredictor/Conv2D"
      op: "Conv2D"
      input: "input"
      input: "BoxPredictor_4/ClassPredictor/weights_quant/FakeQuantWithMinMaxVarsPerChannel"
      attr {
        key: "T"
        value {
          type: DT_FLOAT
        }
      }
      attr {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 18.1K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/lite/tests/prepare-quantize-dynamic-range.mlir

      %b = arith.constant dense<-1.23697901> : tensor<64xf32>
      %conv = "tfl.conv_2d"(%0, %w, %b) {dilation_h_factor = 1 : i32, dilation_w_factor = 1 : i32, fused_activation_function = "NONE", padding = "SAME", stride_h = 2 : i32, stride_w = 2 : i32} : (tensor<1x224x224x3xf32>, tensor<64x3x3x3xf32>, tensor<64xf32>) -> tensor<1x112x112x64xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 38.2K bytes
    - Viewed (0)
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