}
        },
        {
          "type": "portmap",
          "snat": true,
          "capabilities": {"portMappings": true}
        },
        {
          "type": "bandwidth",
          "capabilities": {"bandwidth": true}
        }
      ]
    }
---
# Source: calico/templates/kdd-crds.yaml
apiVersion: apiextensions.k8s.io/v1
kind: CustomResourceDefinition
metadata:

                                      const float max_value,
                                      const float bin_width) {
  const float lower_bound = CalculateLowerBound(min_value, bin_width);
  return std::ceil((max_value - lower_bound) / bin_width);
}

TEST(CalibrationParametersTest, CalculateBinWidthSmallerThanOne) {
  float bin_width = CalculateBinWidth(/*min_value=*/0.0, /*max_value=*/25.0,
                                      /*num_bins=*/256);

// `N * bin_width`.
inline float CalculateLowerBound(const float min_value, const float bin_width) {
  return std::floor(min_value / bin_width) * bin_width;
}

// Calculates the bin index of the current value.
inline int32_t CalculateBinIndex(const float value, const float lower_bound,
                                 const float bin_width) {
  return std::floor((value - lower_bound) / bin_width);
}

  message HistogramStatistics {
    // width of bin
    float bin_width = 1;

    // lower_bound is the first bin's min value.
    // lower_bound and bin_width can be used to restore the histogram.
    float lower_bound = 2;

    // hist_freq[i] saves frequency of range [bins[i], bins[i + 1]).
    // bins[i]     = lower_bound + bin_width * i
    // bins[i + 1] = lower_bound + bin_width * (i + 1)
    repeated float hist_freq = 3;
  }

  EXPECT_TRUE(statistics.has_value());
  EXPECT_EQ(statistics.value().histogram_statistics().lower_bound(), 0.f);
  EXPECT_EQ(statistics.value().histogram_statistics().bin_width(), 2.f);
  // Trailing zeros should be removed.
  EXPECT_THAT(statistics.value().histogram_statistics().hist_freq(),
              ElementsAre(1, 0, 3, 5, 7, 6, 5));
}

			remain = remain[allowed:]
			sentEnd = sawEOF && len(remain) == 0 && !hasTrailers
			err = cc.fr.WriteData(cs.ID, sentEnd, data)
			if err == nil {
				// TODO(bradfitz): this flush is for latency, not bandwidth.
				// Most requests won't need this. Make this opt-in or
				// opt-out?  Use some heuristic on the body type? Nagel-like
				// timers?  Based on 'n'? Only last chunk of this for loop,

                          const float bin_width, const float lower_bound,
                          const float range_start, const float range_end) {
  float freq_sum = 0.f;
  for (float range = std::max(range_start, lower_bound); range < range_end;
       range += bin_width) {
    const int32_t idx = CalculateBinIndex(range, lower_bound, bin_width);
    if (idx >= histogram.size()) break;

    histogram_flat.setZero();

    const float bin_width = CalculateBinWidth(min_value, max_value, num_bins);
    const float lower_bound = CalculateLowerBound(min_value, bin_width);
    for (int i = 0; i < input_flat.size(); ++i) {
      int32_t bin_index = CalculateBinIndexSafe(
          input_flat.data()[i], lower_bound, bin_width, num_bins);
      histogram_flat.data()[bin_index] += 1;
    }
  }
};

    self._bin_width = hist_stats.bin_width
    self._lower_bound = hist_stats.lower_bound
    self._hist_freq = np.array(hist_stats.hist_freq)
    self._num_bins = len(self._hist_freq)
    self._num_bits = 8
    # i-th bin has a range [bins[i], bins[i + 1]).
    # bins[i] = lower_bound + i * bin_width
    # bins[i + 1] = lower_bound + (i + 1) * bin_width
    # So hist_mids[i] = (lower_bound + bin_width / 2) + bin_width * i

// * Linux workstation with 6-core Intel Xeon CPU
// * Linux workstation with 24-core Intel Xeon CPU
//
// It is very likely (though not confirmed) that this workload is limited
// by memory bandwidth. We don't have a good way to determine the number of
// workers that would saturate the bus though, so runtime.GOMAXPROCS
// seems like a reasonable default.
var preloadWorkerCount = runtime.GOMAXPROCS(0)