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Results 61 - 70 of 142 for r13 (0.33 sec)

  1. src/syscall/asm_darwin_amd64.s

    	MOVQ	a1+8(FP), DI
    	MOVQ	a2+16(FP), SI
    	MOVQ	a3+24(FP), DX
    	MOVQ	a4+32(FP), R10
    	MOVQ	a5+40(FP), R8
    	MOVQ	a6+48(FP), R9
    	MOVQ	a7+56(FP), R11
    	MOVQ	a8+64(FP), R12
    	MOVQ	a9+72(FP), R13
    	SUBQ	$32, SP
    	MOVQ	R11, 8(SP)
    	MOVQ	R12, 16(SP)
    	MOVQ	R13, 24(SP)
    	ADDQ	$0x2000000, AX
    	SYSCALL
    	JCC	ok9
    	ADDQ	$32, SP
    	MOVQ	$-1, r1+80(FP)
    	MOVQ	$0, r2+88(FP)
    	MOVQ	AX, err+96(FP)
    	CALL	runtime·exitsyscall<ABIInternal>(SB)
    	RET
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 16 15:40:39 UTC 2022
    - 2.9K bytes
    - Viewed (0)
  2. src/runtime/preempt_mips64x.s

    	MOVV R3, 24(R29)
    	MOVV R4, 32(R29)
    	MOVV R5, 40(R29)
    	MOVV R6, 48(R29)
    	MOVV R7, 56(R29)
    	MOVV R8, 64(R29)
    	MOVV R9, 72(R29)
    	MOVV R10, 80(R29)
    	MOVV R11, 88(R29)
    	MOVV R12, 96(R29)
    	MOVV R13, 104(R29)
    	MOVV R14, 112(R29)
    	MOVV R15, 120(R29)
    	MOVV R16, 128(R29)
    	MOVV R17, 136(R29)
    	MOVV R18, 144(R29)
    	MOVV R19, 152(R29)
    	MOVV R20, 160(R29)
    	MOVV R21, 168(R29)
    	MOVV R22, 176(R29)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 2.7K bytes
    - Viewed (0)
  3. src/runtime/signal_darwin_amd64.go

    func (c *sigctxt) r10() uint64 { return c.regs().r10 }
    func (c *sigctxt) r11() uint64 { return c.regs().r11 }
    func (c *sigctxt) r12() uint64 { return c.regs().r12 }
    func (c *sigctxt) r13() uint64 { return c.regs().r13 }
    func (c *sigctxt) r14() uint64 { return c.regs().r14 }
    func (c *sigctxt) r15() uint64 { return c.regs().r15 }
    
    //go:nosplit
    //go:nowritebarrierrec
    func (c *sigctxt) rip() uint64 { return c.regs().rip }
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 19 23:07:11 UTC 2022
    - 4K bytes
    - Viewed (0)
  4. src/runtime/preempt_loong64.s

    	MOVV R1, -480(R3)
    	SUBV $480, R3
    	MOVV R4, 8(R3)
    	MOVV R5, 16(R3)
    	MOVV R6, 24(R3)
    	MOVV R7, 32(R3)
    	MOVV R8, 40(R3)
    	MOVV R9, 48(R3)
    	MOVV R10, 56(R3)
    	MOVV R11, 64(R3)
    	MOVV R12, 72(R3)
    	MOVV R13, 80(R3)
    	MOVV R14, 88(R3)
    	MOVV R15, 96(R3)
    	MOVV R16, 104(R3)
    	MOVV R17, 112(R3)
    	MOVV R18, 120(R3)
    	MOVV R19, 128(R3)
    	MOVV R20, 136(R3)
    	MOVV R21, 144(R3)
    	MOVV R23, 152(R3)
    	MOVV R24, 160(R3)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 22 19:29:43 UTC 2023
    - 2.4K bytes
    - Viewed (0)
  5. src/runtime/preempt_mipsx.s

    	MOVW R3, 12(R29)
    	MOVW R4, 16(R29)
    	MOVW R5, 20(R29)
    	MOVW R6, 24(R29)
    	MOVW R7, 28(R29)
    	MOVW R8, 32(R29)
    	MOVW R9, 36(R29)
    	MOVW R10, 40(R29)
    	MOVW R11, 44(R29)
    	MOVW R12, 48(R29)
    	MOVW R13, 52(R29)
    	MOVW R14, 56(R29)
    	MOVW R15, 60(R29)
    	MOVW R16, 64(R29)
    	MOVW R17, 68(R29)
    	MOVW R18, 72(R29)
    	MOVW R19, 76(R29)
    	MOVW R20, 80(R29)
    	MOVW R21, 84(R29)
    	MOVW R22, 88(R29)
    	MOVW R24, 92(R29)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 2.7K bytes
    - Viewed (0)
  6. src/runtime/signal_arm64.go

    	print("r8      ", hex(c.r8()), "\n")
    	print("r9      ", hex(c.r9()), "\n")
    	print("r10     ", hex(c.r10()), "\n")
    	print("r11     ", hex(c.r11()), "\n")
    	print("r12     ", hex(c.r12()), "\n")
    	print("r13     ", hex(c.r13()), "\n")
    	print("r14     ", hex(c.r14()), "\n")
    	print("r15     ", hex(c.r15()), "\n")
    	print("r16     ", hex(c.r16()), "\n")
    	print("r17     ", hex(c.r17()), "\n")
    	print("r18     ", hex(c.r18()), "\n")
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Apr 05 18:16:00 UTC 2023
    - 3.8K bytes
    - Viewed (0)
  7. src/runtime/sys_dragonfly_amd64.s

    	MOVL $495, AX		// lwp_create
    	SYSCALL
    	MOVL	AX, ret+8(FP)
    	RET
    
    TEXT runtime·lwp_start(SB),NOSPLIT,$0
    	MOVQ	DI, R13 // m
    
    	// set up FS to point at m->tls
    	LEAQ	m_tls(R13), DI
    	CALL	runtime·settls(SB)	// smashes DI
    
    	// set up m, g
    	get_tls(CX)
    	MOVQ	m_g0(R13), DI
    	MOVQ	R13, g_m(DI)
    	MOVQ	DI, g(CX)
    
    	CALL	runtime·stackcheck(SB)
    	CALL	runtime·mstart(SB)
    
    	MOVQ 0, AX			// crash (not reached)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Jun 06 18:49:01 UTC 2023
    - 8.3K bytes
    - Viewed (0)
  8. src/cmd/vendor/golang.org/x/sys/unix/zptrace_x86_linux.go

    	return ptracePtr(PTRACE_SETREGS, pid, 0, unsafe.Pointer(regs))
    }
    
    // PtraceRegsAmd64 is the registers used by amd64 binaries.
    type PtraceRegsAmd64 struct {
    	R15      uint64
    	R14      uint64
    	R13      uint64
    	R12      uint64
    	Rbp      uint64
    	Rbx      uint64
    	R11      uint64
    	R10      uint64
    	R9       uint64
    	R8       uint64
    	Rax      uint64
    	Rcx      uint64
    	Rdx      uint64
    	Rsi      uint64
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:33 UTC 2023
    - 1.8K bytes
    - Viewed (0)
  9. src/runtime/signal_ppc64x.go

    	print("r8   ", hex(c.r8()), "\t")
    	print("r9   ", hex(c.r9()), "\n")
    	print("r10  ", hex(c.r10()), "\t")
    	print("r11  ", hex(c.r11()), "\n")
    	print("r12  ", hex(c.r12()), "\t")
    	print("r13  ", hex(c.r13()), "\n")
    	print("r14  ", hex(c.r14()), "\t")
    	print("r15  ", hex(c.r15()), "\n")
    	print("r16  ", hex(c.r16()), "\t")
    	print("r17  ", hex(c.r17()), "\n")
    	print("r18  ", hex(c.r18()), "\t")
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Sep 08 15:08:04 UTC 2023
    - 3.7K bytes
    - Viewed (0)
  10. src/crypto/md5/md5block_arm64.s

    	MOVD	dig+0(FP), R0
    	MOVD	p+8(FP), R1
    	MOVD	p_len+16(FP), R2
    	AND	$~63, R2
    	CBZ	R2, zero
    
    	ADD	R1, R2, R21
    	LDPW	(0*8)(R0), (R4, R5)
    	LDPW	(1*8)(R0), (R6, R7)
    
    loop:
    	MOVW	R4, R12
    	MOVW	R5, R13
    	MOVW	R6, R14
    	MOVW	R7, R15
    
    	MOVW	(0*4)(R1), R8
    	MOVW	R7, R9
    
    #define ROUND1(a, b, c, d, index, const, shift) \
    	ADDW	$const, a; \
    	ADDW	R8, a; \
    	MOVW	(index*4)(R1), R8; \
    	EORW	c, R9; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 4.1K bytes
    - Viewed (0)
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