RET

// void	Or8(byte volatile*, byte);
TEXT ·Or8(SB), NOSPLIT, $0-9
	MOVV	ptr+0(FP), R4
	MOVBU	val+8(FP), R5
	// Align ptr down to 4 bytes so we can use 32-bit load/store.
	MOVV	$~3, R6
	AND	R4, R6
	// R7 = ((ptr & 3) * 8)
	AND	$3, R4, R7
	SLLV	$3, R7
	// Shift val for aligned ptr. R5 = val << R4
	SLLV	R7, R5

	DBAR
	LL	(R6), R7
	OR	R5, R7
	SC	R7, (R6)
	BEQ	R7, -4(PC)
	DBAR
	RET

// check is negligible since it is only required for large copies.
//
// Large copies use a software pipelined loop processing 64 bytes per iteration.
// The destination pointer is 16-byte aligned to minimize unaligned accesses.
// The loop tail is handled by always copying 64 bytes from the end.

// func memmove(to, from unsafe.Pointer, n uintptr)
TEXT runtime·memmove<ABIInternal>(SB), NOSPLIT|NOFRAME, $0-24
	CBZ	R2, copy0

}

type ucontext struct {
	uc_flags    uint64
	uc_link     *ucontext
	uc_stack    stackt
	uc_sigmask  uint64
	_pad        [(1024 - 64) / 8]byte
	_pad2       [8]byte // sigcontext must be aligned to 16-byte
	uc_mcontext sigcontext

// using the initial stack allocated by the OS.
// It calls back into standard C using the BL below.
// To do that, the stack pointer must be 8-byte-aligned.
TEXT runtime·_initcgo(SB),NOSPLIT|NOFRAME,$0
	MOVM.DB.W [R4, R14], (R13)	// push {r4, lr}

	// Ensure stack is 8-byte aligned before calling C code
	MOVW	R13, R4
	BIC	$0x7, R13

	// Allocate a TLS slot to hold g across calls to external code

	minRoutingSockaddrLen = rsaAlignOf(0)
)

// Round the length of a raw sockaddr up to align it properly.
func rsaAlignOf(salen int) int {
	salign := sizeofPtr
	if darwin64Bit {
		// Darwin kernels require 32-bit aligned access to
		// routing facilities.
		salign = 4
	} else if netbsd32Bit {
		// NetBSD 6 and beyond kernels require 64-bit aligned
		// access to routing facilities.
		salign = 8
	} else if runtime.GOOS == "freebsd" {

        // We need to check if the target version exists. For this, we have to try to get metadata for the aligned version.
        // If it's there, it means we can align, otherwise, we must NOT add the edge, or resolution would fail
        ComponentGraphResolveState metadata = version.getResolveStateOrNull();

		p = alignUp(p, align)
		p2 := sysReserve(unsafe.Pointer(p), size)
		if p != uintptr(p2) {
			// Must have raced. Try again.
			sysFreeOS(p2, size)
			if retries++; retries == 100 {
				throw("failed to allocate aligned heap memory; too many retries")
			}
			goto retry
		}
		// Success.
		return p2, size
	default:
		// Trim off the unaligned parts.
		pAligned := alignUp(p, align)

}

// The pointer tag, OR-ed into the XlaTensor's address to distinguish it from
// device-side tensors, which are either CPU or GPU memory pointers. This works
// because we're guaranteed that CPU and GPU pointers are aligned to > 1 bits.
namespace {
constexpr uintptr_t kTag = 0x1ULL;
}

/*static*/ XlaTensor* XlaTensor::FromOpaquePointer(void* ptr) {
  uintptr_t value = reinterpret_cast<uintptr_t>(ptr);
  if (value & kTag) {

//
// This method is a helper for dealing with the endianness of different CPU
// architectures, since sub-word-sized arguments in big endian architectures
// need to be "aligned" to the upper edge of the register to be interpreted
// by the CPU correctly.
func (r *RegArgs) IntRegArgAddr(reg int, argSize uintptr) unsafe.Pointer {
	if argSize > goarch.PtrSize || argSize == 0 || argSize&(argSize-1) != 0 {

TEXT ·Or8(SB), NOSPLIT, $0-9
	MOVV	ptr+0(FP), R1
	MOVBU	val+8(FP), R2
	// Align ptr down to 4 bytes so we can use 32-bit load/store.
	MOVV	$~3, R3
	AND	R1, R3
	// Compute val shift.
#ifdef GOARCH_mips64
	// Big endian.  ptr = ptr ^ 3
	XOR	$3, R1
#endif
	// R4 = ((ptr & 3) * 8)
	AND	$3, R1, R4
	SLLV	$3, R4
	// Shift val for aligned ptr. R2 = val << R4
	SLLV	R4, R2

	SYNC
	LL	(R3), R4
	OR	R2, R4