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Results 61 - 70 of 104 for RELU (0.69 sec)
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tensorflow/compiler/mlir/lite/tests/optimize.mlir
// Fusing: %[[add1:[0-9].*]] = tfl.add %arg0, %[[add]] {fused_activation_function = "RELU"} : tensor<1xf32> // Fusing: %[[relu:[0-9].*]] = "tfl.relu"(%arg0) : (tensor<1xf32>) -> tensor<1xf32> // Fusing: %[[add2:[0-9].*]] = tfl.add %[[relu]], %[[add1]] {fused_activation_function = "RELU6"} : tensor<1xf32> // Fusing: %[[add3:[0-9].*]] = tfl.add %[[add2]], %[[relu]] {fused_activation_function = "RELU6"} : tensor<1xf32> // Fusing: return
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 16 20:31:41 UTC 2024 - 284.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/transforms/optimize_patterns.td
(HasRankAtMost<4> $a), (HasRankAtMost<4> $b)]>; } // We can eliminate Relu from Relu(SquaredDifference(x, y)), // since the result of SquaredDifference is always non-negative. // TFLite interpreter doesn't support Relu+int32 for now. So the test cases // are failing without the following pattern to optimize Relu away fixes // the problem. def OptimizeReluSquaredDifference : Pat<
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 16 20:31:41 UTC 2024 - 66.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/tfl_while_outline.mlir
%14 = "tfl.relu"(%10#1) : (tensor<4x2xf32>) -> tensor<4x2xf32> %15 = "tfl.logistic"(%10#0) : (tensor<4x2xf32>) -> tensor<4x2xf32> %16 = tfl.mul %15, %14 {fused_activation_function = "NONE"} : tensor<4x2xf32> %17 = tfl.add %13, %16 {fused_activation_function = "NONE"} : tensor<4x2xf32> %18 = "tfl.relu"(%17) : (tensor<4x2xf32>) -> tensor<4x2xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 13.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/experimental/tac/hardwares/gpu_hardware.cc
// tfl.Abs / tfl.Average_pool_2d / tfl.Cos / tfl.div / tfl.exp / tfl.hardswish / // tfl.log / tfl.logistic / tfl.max_pool_2d / tfl.mirror_pad / tfl.maximum / // tfl.custom / tfl.mean / tfl.minimum / tfl.pad / tfl.pow / tfl.prelu / // tfl.relu / tfl.relu6 / tfl.rsqrt / tfl.sin / tfl.slice / tfl.softmax / // tfl.space_to_depth / tfl.sqrt / tfl.square / tfl.squared_difference / // tfl.strided_slice / tfl.tanh / tfl.transpose / tfl.transpose_conv
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 06 03:08:33 UTC 2023 - 7.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/passes/merge_fusion_with_dequantize.cc
func_op.eraseResult(0); func_op.insertResult(0, new_call_op.getResult(0).getType(), /*resultAttrs=*/nullptr); // Modify the quantized fused function to do dequantize+relu(6). rewriter.setInsertionPoint(req_op); Value new_result = rewriter.create<mlir::stablehlo::UniformDequantizeOp>( req_op.getLoc(), func_op.getResultTypes()[0], req_op.getOperand());
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 5.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/lift_quantizable_spots_as_functions_xla.mlir
%3 = "tf.BiasAdd"(%2, %cst_0) {data_format = "NHWC", device = ""} : (tensor<1x3x2x2xf32>, tensor<2xf32>) -> tensor<1x3x2x2xf32> %4 = "tf.Relu"(%3) {device = ""} : (tensor<1x3x2x2xf32>) -> tensor<1x3x2x2xf32> %5 = "quantfork.qcast"(%4) : (tensor<1x3x2x2xf32>) -> tensor<1x3x2x2x!quant.uniform<i8:f32, 0.0027450981093387976:-19>>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 8.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/tf_to_corert/tf_to_corert_pipeline.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 08 00:18:59 UTC 2024 - 7.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/prepare-quantize-dynamic-range.mlir
%broad2_s = "quantfork.stats"(%broad2) {layerStats = dense<[0.000000e+00, 1.000000e+01]> : tensor<2xf32>} : (tensor<?x26x26x26x16xf32>) -> tensor<?x26x26x26x16xf32> %add = "tfl.add"(%broad1_s, %broad2_s) {fused_activation_function = "RELU"} : (tensor<?x26x26x26x16xf32>, tensor<?x26x26x26x16xf32>) -> tensor<?x26x26x26x16xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 38.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/transforms/legalize_patterns.td
(TFL_RangeOp $start, $limit, $delta)>; def LegalizeRelu6 : Pat<(TF_Relu6Op $arg), (TFL_Relu6Op $arg)>; def LegalizeRelu : Pat<(TF_ReluOp $arg), (TFL_ReluOp $arg)>; // TFL Relu doesn't support I32/I64 type, so legalizes TF Relu to TFL Maximum. def LegalizeReluI32 : Pat<(TF_ReluOp TensorOf<[I32]>:$arg), (TFL_MaximumOp $arg, (Arith_ConstantOp ConstantAttr<RankedI32ElementsAttr<[]>,"0">))>;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 04 13:30:42 UTC 2024 - 28.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/mlrt/tpu_conversions.mlir
// CHECK-NEXT: tf_mlrt.executeop.device{{.*}}op: \22Relu\22 // CHECK-NEXT: tf_mlrt_tpu.compile_and_execute %0 = "tf.Cast"(%arg0) {__op_key = 0: i32, device = "/device:CPU:0"} : (tensor<i32>) -> tensor<f32> %1 = "tf.Relu"(%0) {__op_key = 1: i32, device = "/device:CPU:0"} : (tensor<f32>) -> (tensor<f32>)
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Oct 04 21:25:31 UTC 2023 - 11K bytes - Viewed (0)