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Results 51 - 60 of 214 for add32a (0.09 sec)
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tensorflow/compiler/mlir/quantization/tensorflow/tests/prepare_lifting.mlir
// CHECK: %[[mul:.*]] = "tf.Mul"(%arg0, %[[CONST_0]]) : (tensor<*xf32>, tensor<2xf32>) -> tensor<*xf32> // CHECK: %[[add:.*]] = "tf.AddV2"(%[[mul]], %[[CONST]]) : (tensor<*xf32>, tensor<2xf32>) -> tensor<*xf32> // CHECK-NEXT: return %[[add]] : tensor<*xf32> // ----- func.func @not_decompose_batch_norm(%arg0: tensor<*xf32>) -> (tensor<*xf32>) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Feb 14 03:24:59 UTC 2024 - 33.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/mlir2graphdef/case.mlir
%0 = tf_executor.graph { %outputs, %control = tf_executor.island wraps "tf.Const"() {device = "", value = dense<1> : tensor<i32>} : () -> tensor<i32> %outputs_0, %control_1 = tf_executor.island wraps "tf.AddV2"(%arg0, %outputs) {device = ""} : (tensor<i32>, tensor<i32>) -> tensor<*xi32> tf_executor.fetch %outputs_0 : tensor<*xi32> } func.return %0 : tensor<*xi32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Mar 28 12:06:33 UTC 2022 - 2.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/lower-static-tensor-list.mlir
// CHECK-LABEL: func @otherVariantWhileBody // CHECK: [[CST:%.*]] = "tf.Const"() // CHECK-NEXT: [[ADD:%.*]] = "tf.AddV2"(%arg2, [[CST]]) // CHECK-NEXT: [[TENSOR_MAP_INSERT_RESULT:%.*]] = "tf.TensorMapInsert"(%arg3, %arg2, %arg2) // CHECK-NEXT: [[ADD_2:%.*]] = "tf.AddV2"(%arg0, [[CST]]) // CHECK-NEXT: return [[ADD_2]], %arg1, [[ADD]], [[TENSOR_MAP_INSERT_RESULT]]
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 39.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_move_transposes_end.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 9.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/decompose_resource_ops.mlir
// CHECK: [[ACCUM_NEW:%.*]] = "tf.AddV2"([[ACCUM_MOMENTUM]], [[GRAD]]) // CHECK: "tf.AssignVariableOp"([[ACCUM_HANDLE]], [[ACCUM_NEW]]) // CHECK: [[GRAD_LR:%.*]] = "tf.Mul"([[GRAD]], [[LR]]) // CHECK: [[MOMENTUM_LR:%.*]] = "tf.Mul"([[MOMENTUM]], [[LR]]) // CHECK: [[ACCUM_NEW_MOMENTUM_LR:%.*]] = "tf.Mul"([[ACCUM_NEW]], [[MOMENTUM_LR]]) // CHECK: [[DELTA:%.*]] = "tf.AddV2"([[GRAD_LR]], [[ACCUM_NEW_MOMENTUM_LR]])
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 22 19:47:48 UTC 2024 - 51.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/cast_bf16_ops_to_f32.mlir
// CHECK: return %[[identity]] : tensor<1x1x2xf32> // Tests that an AddV2 op accepting two bf16 operands is transformed into // an AddV2 op that accepts two fp32 operands. func.func @cast_bf16_add_v2_to_fp32(%arg0: tensor<2xbf16>, %arg1: tensor<2xbf16>) -> tensor<2xf32> { %0 = "tf.AddV2"(%arg0, %arg1) : (tensor<2xbf16>, tensor<2xbf16>) -> tensor<2xbf16>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 8.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/update_control_dependencies.mlir
%add2, %add2_control = tf_executor.island(%add1_control) wraps "tf.Add"(%add1, %arg1) : (tensor<*xi32>, tensor<i32>) -> tensor<*xi32> %print, %print_control = tf_executor.island wraps "tf.Print"(%add2) {message = "add2 result"} : (tensor<*xi32>) -> tensor<*xi32> tf_executor.fetch %add1, %add2, %add2_control : tensor<*xi32>, tensor<*xi32>, !tf_executor.control }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Nov 03 18:12:49 UTC 2023 - 25.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/saved_model/testdata/xla_launch.mlir
func.func @while_body(%arg0: tensor<i32>) -> tensor<i32> { %1 = "tf.AddV2"(%arg0, %arg0) {} : (tensor<i32>, tensor<i32>) -> tensor<i32> func.return %1 : tensor<i32> } func.func private @xla_func_0(%arg0: tensor<1x3xf32>, %arg1: tensor<1x3xf32>) -> tensor<1x3xf32> attributes {tf._XlaMustCompile = true, tf._noinline = true, tf._original_func_name = "should_not_be_used"} { %1 = "tf.AddV2"(%arg0, %arg1) : (tensor<1x3xf32>, tensor<1x3xf32>) -> tensor<1x3xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Aug 14 15:35:49 UTC 2023 - 1.6K bytes - Viewed (0) -
src/internal/runtime/atomic/atomic_mipsx.s
MOVW R3, ret+8(FP) RET // func And32(addr *uint32, v uint32) old uint32 TEXT ·And32(SB), NOSPLIT, $0-12 MOVW ptr+0(FP), R1 MOVW val+4(FP), R2 SYNC LL (R1), R3 AND R2, R3, R4 SC R4, (R1) BEQ R4, -4(PC) SYNC MOVW R3, ret+8(FP) RET // func Anduintptr(addr *uintptr, v uintptr) old uintptr TEXT ·Anduintptr(SB), NOSPLIT, $0-12 JMP ·And32(SB)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 11 21:29:34 UTC 2024 - 4.9K bytes - Viewed (0) -
src/net/iprawsock_test.go
continue } if err == nil { addr2, err := ResolveIPAddr(addr.Network(), addr.String()) if !reflect.DeepEqual(addr2, tt.addr) || err != tt.err { t.Errorf("(%q, %q): ResolveIPAddr(%q, %q) = %#v, %v, want %#v, %v", tt.network, tt.litAddrOrName, addr.Network(), addr.String(), addr2, err, tt.addr, tt.err) } } } } var ipConnLocalNameTests = []struct {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Sep 18 17:20:52 UTC 2023 - 6K bytes - Viewed (0)