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Results 21 - 29 of 29 for MOVHreg (0.15 sec)

  1. src/cmd/compile/internal/ssa/_gen/MIPS64Ops.go

    		{name: "MOVBreg", argLength: 1, reg: gp11, asm: "MOVB"},   // move from arg0, sign-extended from byte
    		{name: "MOVBUreg", argLength: 1, reg: gp11, asm: "MOVBU"}, // move from arg0, unsign-extended from byte
    		{name: "MOVHreg", argLength: 1, reg: gp11, asm: "MOVH"},   // move from arg0, sign-extended from half
    		{name: "MOVHUreg", argLength: 1, reg: gp11, asm: "MOVHU"}, // move from arg0, unsign-extended from half
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 03:36:31 UTC 2023
    - 25.5K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go

    		// Conversions
    		{name: "MOVBreg", argLength: 1, reg: gp11, asm: "MOVB"},   // move from arg0, sign-extended from byte
    		{name: "MOVHreg", argLength: 1, reg: gp11, asm: "MOVH"},   // move from arg0, sign-extended from half
    		{name: "MOVWreg", argLength: 1, reg: gp11, asm: "MOVW"},   // move from arg0, sign-extended from word
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 30.7K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/rewriteARM.go

    		}
    		v.reset(OpARMMOVWreg)
    		v.AddArg(x)
    		return true
    	}
    	// match: (MOVHreg x:(MOVHreg _))
    	// result: (MOVWreg x)
    	for {
    		x := v_0
    		if x.Op != OpARMMOVHreg {
    			break
    		}
    		v.reset(OpARMMOVWreg)
    		v.AddArg(x)
    		return true
    	}
    	// match: (MOVHreg (MOVWconst [c]))
    	// result: (MOVWconst [int32(int16(c))])
    	for {
    		if v_0.Op != OpARMMOVWconst {
    			break
    		}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 486.8K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/ARMOps.go

    		{name: "MOVBreg", argLength: 1, reg: gp11, asm: "MOVBS"},  // move from arg0, sign-extended from byte
    		{name: "MOVBUreg", argLength: 1, reg: gp11, asm: "MOVBU"}, // move from arg0, unsign-extended from byte
    		{name: "MOVHreg", argLength: 1, reg: gp11, asm: "MOVHS"},  // move from arg0, sign-extended from half
    		{name: "MOVHUreg", argLength: 1, reg: gp11, asm: "MOVHU"}, // move from arg0, unsign-extended from half
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 24 00:21:13 UTC 2023
    - 41K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

    		{name: "MOVBreg", argLength: 1, reg: gp11, asm: "MOVB", typ: "Int64"},   // sign extend int8 to int64
    		{name: "MOVBZreg", argLength: 1, reg: gp11, asm: "MOVBZ", typ: "Int64"}, // zero extend uint8 to uint64
    		{name: "MOVHreg", argLength: 1, reg: gp11, asm: "MOVH", typ: "Int64"},   // sign extend int16 to int64
    		{name: "MOVHZreg", argLength: 1, reg: gp11, asm: "MOVHZ", typ: "Int64"}, // zero extend uint16 to uint64
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/_gen/S390XOps.go

    		{name: "MOVBZreg", argLength: 1, reg: gp11sp, asm: "MOVBZ", typ: "UInt64"}, // zero extend arg0 from int8 to int64
    		{name: "MOVHreg", argLength: 1, reg: gp11sp, asm: "MOVH", typ: "Int64"},    // sign extend arg0 from int16 to int64
    		{name: "MOVHZreg", argLength: 1, reg: gp11sp, asm: "MOVHZ", typ: "UInt64"}, // zero extend arg0 from int16 to int64
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 24 00:21:13 UTC 2023
    - 52.5K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/_gen/ARM64Ops.go

    		{name: "MOVBreg", argLength: 1, reg: gp11, asm: "MOVB"},   // move from arg0, sign-extended from byte
    		{name: "MOVBUreg", argLength: 1, reg: gp11, asm: "MOVBU"}, // move from arg0, unsign-extended from byte
    		{name: "MOVHreg", argLength: 1, reg: gp11, asm: "MOVH"},   // move from arg0, sign-extended from half
    		{name: "MOVHUreg", argLength: 1, reg: gp11, asm: "MOVHU"}, // move from arg0, unsign-extended from half
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 58.8K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/rewriteARM64.go

    	v_0 := v.Args[0]
    	// match: (MOVHreg (MOVDconst [c]))
    	// result: (MOVDconst [int64(int16(c))])
    	for {
    		if v_0.Op != OpARM64MOVDconst {
    			break
    		}
    		c := auxIntToInt64(v_0.AuxInt)
    		v.reset(OpARM64MOVDconst)
    		v.AuxInt = int64ToAuxInt(int64(int16(c)))
    		return true
    	}
    	// match: (MOVHreg x)
    	// cond: v.Type.Size() <= 2
    	// result: x
    	for {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 608.6K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/opGen.go

    				{0, 22527}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 g R12 R14
    			},
    			outputs: []outputInfo{
    				{0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
    			},
    		},
    	},
    	{
    		name:   "MOVHreg",
    		argLen: 1,
    		asm:    arm.AMOVHS,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 22527}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 g R12 R14
    			},
    			outputs: []outputInfo{
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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