- Sort Score
- Result 10 results
- Languages All
Results 111 - 120 of 214 for add32a (0.15 sec)
-
src/internal/runtime/atomic/atomic_386.go
func And8(ptr *uint8, val uint8) //go:noescape func Or8(ptr *uint8, val uint8) //go:noescape func And(ptr *uint32, val uint32) //go:noescape func Or(ptr *uint32, val uint32) //go:noescape func And32(ptr *uint32, val uint32) uint32 //go:noescape func Or32(ptr *uint32, val uint32) uint32 //go:noescape func And64(ptr *uint64, val uint64) uint64 //go:noescape func Or64(ptr *uint64, val uint64) uint64
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 19:57:43 UTC 2024 - 2.2K bytes - Viewed (0) -
src/math/rand/v2/rand.go
hi, lo1b := bits.Mul32(uint32(x>>32), n) lo1, c := bits.Add32(lo1a, lo1b, 0) hi += c if lo1 == 0 && lo0 < uint32(n) { n64 := uint64(n) thresh := uint32(-n64 % n64) for lo1 == 0 && lo0 < thresh { x := r.Uint64() lo1a, lo0 = bits.Mul32(uint32(x), n) hi, lo1b = bits.Mul32(uint32(x>>32), n) lo1, c = bits.Add32(lo1a, lo1b, 0) hi += c } } return hi }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:25:49 UTC 2024 - 12.8K bytes - Viewed (0) -
src/internal/runtime/atomic/atomic_amd64.go
func And8(ptr *uint8, val uint8) //go:noescape func Or8(ptr *uint8, val uint8) //go:noescape func And(ptr *uint32, val uint32) //go:noescape func Or(ptr *uint32, val uint32) //go:noescape func And32(ptr *uint32, val uint32) uint32 //go:noescape func Or32(ptr *uint32, val uint32) uint32 //go:noescape func And64(ptr *uint64, val uint64) uint64 //go:noescape func Or64(ptr *uint64, val uint64) uint64
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 19:53:03 UTC 2024 - 2.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tf_saved_model/hash_table_v1.py
# CHECK-SAME: shared_name = "[[hash_table]]" # CHECK-NEXT: [[R2:%.*]] = "tf.LookupTableFindV2"([[R1]], [[ARG0]], [[R0]]) # CHECK-NEXT: [[R3:%.*]] = "tf.ReadVariableOp"([[ARG1]]) # CHECK-NEXT: [[R4:%.*]] = "tf.AddV2"([[R2]], [[R3]]) # CHECK-NEXT: return [[R4]] def Test(): z = tf.compat.v1.get_variable( name='y', shape=(), initializer=tf.random_normal_initializer(), trainable=True)
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Oct 31 08:49:35 UTC 2023 - 3.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/insert_custom_aggregation_ops.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 10 04:07:09 UTC 2024 - 32.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/group_by_dialect.mlir
%2 = mhlo.constant dense<[[1.1]]> : tensor<1x1xf32> %3 = mhlo.multiply %2, %2 : tensor<1x1xf32> %cst = "tf.Const"() {value = dense<0.0> : tensor<f32>} : () -> tensor<f32> %0 = "tf.AddV2"(%arg0, %cst) {device = "/device:CPU:0"} : (tensor<f32>, tensor<f32>) -> tensor<f32> %1 = "tf.Identity"(%0) {device = ""} : (tensor<f32>) -> tensor<f32> "tf.NoOp"() {device = ""} : () -> () func.return %1 : tensor<f32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Sep 28 23:43:21 UTC 2022 - 5.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_bridge_v1/end_to_end.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Mar 13 21:23:47 UTC 2024 - 3.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tf-functional-to-executor.mlir
// CHECK: %[[ADD1:.*]] = "tf.Add"(%[[ARG0]], %[[ARG1]]) : (tensor<*xi32>, tensor<i32>) -> tensor<*xi32> // CHECK: %[[ADD2:.*]] = "tf.Add"(%[[ADD1]], %[[ARG1]]) : (tensor<*xi32>, tensor<i32>) -> tensor<*xi32> // CHECK: tf_executor.yield %[[ADD1]], %[[ADD2]] : tensor<*xi32>, tensor<*xi32> // CHECK: } // CHECK: tf_executor.fetch %[[ISLAND_RESULT]]#0, %[[ISLAND_RESULT]]#1 : tensor<*xi32>, tensor<*xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Mar 28 12:06:33 UTC 2022 - 2.9K bytes - Viewed (0) -
src/internal/runtime/atomic/atomic_loong64.s
MOVV ptr+0(FP), R4 MOVW val+8(FP), R5 DBAR LL (R4), R6 OR R5, R6, R7 SC R7, (R4) BEQ R7, -4(PC) DBAR MOVW R6, ret+16(FP) RET // func And32(addr *uint32, v uint32) old uint32 TEXT ยทAnd32(SB), NOSPLIT, $0-20 MOVV ptr+0(FP), R4 MOVW val+8(FP), R5 DBAR LL (R4), R6 AND R5, R6, R7 SC R7, (R4) BEQ R7, -4(PC) DBAR MOVW R6, ret+16(FP) RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 19:53:03 UTC 2024 - 6.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu-variable-runtime-reformatting.mlir
}, { // Body region // CHECK: ^bb0 ^bb0(%barg0: tensor<i32>): %b0 = "tf.Const"() {value = dense<-1> : tensor<i32>} : () -> tensor<i32> %b1 = "tf.AddV2"(%barg0, %0) {T = i32, device = ""} : (tensor<i32>, tensor<i32>) -> tensor<i32> // CHECK: %[[COMPILE:.*]]:2 = "tf_device.launch" // CHECK-NEXT: "tf._TPUCompileMlir"() %compile:2 = "tf_device.launch"() ({
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Oct 31 08:59:10 UTC 2023 - 25.4K bytes - Viewed (0)