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tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/quantize_composite_functions.mlir
%0 = stablehlo.convolution(%arg0, %arg1) dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f], window = {pad = [[0, 1], [1, 1]]} {batch_group_count = 1 : i64, feature_group_count = 1 : i64} : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<1x3x4x2xf32> return %0 : tensor<1x3x4x2xf32> } // Checks that the entry function is quantized for convolution. Quantized
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 09 05:56:10 UTC 2024 - 91.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/tf_passes.td
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jun 12 21:18:05 UTC 2024 - 99.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/quantize/quantize.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 18 01:38:40 UTC 2024 - 6.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/instrumentations/save_report_test.cc
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 03 02:59:01 UTC 2024 - 9.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_utils.h
return false; } if (AttrType content = mlir::dyn_cast<AttrType>(attr)) { *out_attr = content; return true; } else { return false; } } // Changes a DenseIntElementsAttr **containing I64** elements to an I32 Vector. bool DenseI64AttrToI32Vector(const DenseIntElementsAttr& dense_attr, std::vector<int32_t>* out_vec); // Gets boolean from composite attrs if it exists.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 29 18:33:05 UTC 2024 - 3.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/composite-lowering.mlir
%3 = mhlo.constant dense<16> : tensor<i64> %4 = "mhlo.broadcast_in_dim"(%3) <{broadcast_dimensions = dense<> : tensor<0xi64>}> : (tensor<i64>) -> tensor<32x32xi64> %5 = mhlo.constant dense<0> : tensor<i64> %6 = "mhlo.broadcast_in_dim"(%5) <{broadcast_dimensions = dense<> : tensor<0xi64>}> : (tensor<i64>) -> tensor<32x32xi64>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 18:45:51 UTC 2024 - 32.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/internal/passes/clustering_passes.td
%2 = "tf._XlaRecvAtHost"(%1) {device_ordinal = 0 : i64, key = "host_compute_channel_0_0_args"} : (tensor<3x!tf_type.string>) -> tensor<f32> %3 = "tf.Identity"(%2) : (tensor<f32>) -> tensor<f32> "tf._XlaSendFromHost"(%3, %1) {device_ordinal = 0 : i64, key = "host_compute_channel_0_0_retvals"} : (tensor<f32>, tensor<3x!tf_type.string>) -> () tf_device.return
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Apr 30 02:01:13 UTC 2024 - 19.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/compose-uniform-quantized-type.mlir
%10 = stablehlo.convolution(%8, %9) dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f], window = {pad = [[1, 1], [1, 1]]} {batch_group_count = 1 : i64, feature_group_count = 1 : i64} : (tensor<1x3x3x4xf32>, tensor<3x3x4x4xf32>) -> tensor<1x3x3x4xf32> %11 = stablehlo.reshape %2 : (tensor<1x1x1x1xi8>) -> tensor<1xi8>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 14 17:10:32 UTC 2024 - 37K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/tf_to_corert/basic.mlir
// CHECK-LABEL: _tfrt_resource_init // CHECK: tf.VarHandleOp // CHECK: tf.ReadVariableOp // CHECK: tfrt_fallback_async.set_resource // CHECK-SAME: {device = "/device:CPU:0", index = 0 : i64} // CHECK-LABEL: func @init // CHECK-SAME: {tfrt.cost_threshold = 1 : i64} func.func @func_init() attributes {tf_saved_model.exported_names = ["init"]} { func.return } // CHECK-LABEL: func @basic // CHECK-SAME: ([[in_chain:%.*]]: !tfrt.chain
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 08 00:18:59 UTC 2024 - 3.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/transforms/prepare_patterns.td
// AddV2 op patterns. //===----------------------------------------------------------------------===// // This is mostly safe, we can use i64 but it will break Darwinn case. // TODO(b/199054442): Change to i64 when Darwinn supports i64. def LowerUInt32AddV2 : Pat< (TF_AddV2Op $lhs, $rhs), (TF_CastOp (TF_AddV2Op (CreateTFCastOpI32 $lhs, /*truncate=*/ConstBoolAttrFalse),
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Apr 30 00:40:15 UTC 2024 - 10.5K bytes - Viewed (0)