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Results 31 - 40 of 196 for add32a (0.09 sec)

  1. src/internal/runtime/atomic/atomic_andor_generic.go

    //go:build arm || wasm
    
    // Export some functions via linkname to assembly in sync/atomic.
    //
    //go:linkname And32
    //go:linkname Or32
    //go:linkname And64
    //go:linkname Or64
    //go:linkname Anduintptr
    //go:linkname Oruintptr
    
    package atomic
    
    import _ "unsafe" // For linkname
    
    //go:nosplit
    func And32(ptr *uint32, val uint32) uint32 {
    	for {
    		old := *ptr
    		if Cas(ptr, old, old&val) {
    			return old
    		}
    	}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 20:08:37 UTC 2024
    - 1.2K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/tests/mlir2flatbuffer/flex_exclusively.mlir

    // CHECK-EMPTY:
    // CHECK-NEXT:        },
    // CHECK-NEXT:        has_rank: true
    // CHECK-NEXT:      }, {
    // CHECK-NEXT:        shape: [ 3, 2 ],
    // CHECK-NEXT:        buffer: 2,
    // CHECK-NEXT:        name: "tf.AddV2",
    // CHECK-NEXT:        quantization: {
    // CHECK-EMPTY:
    // CHECK-NEXT:        },
    // CHECK-NEXT:        has_rank: true
    // CHECK-NEXT:      } ],
    // CHECK-NEXT:      inputs: [ 0 ],
    // CHECK-NEXT:      outputs: [ 1 ],
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jul 14 16:41:28 UTC 2022
    - 2K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/tfrt/tests/sink_in_invariant_ops.mlir

      // CHECK: [[handle:%.*]] = "tf.VarHandleOp"()
      // CHECK: "tf.ReadVariableOp"([[handle]])
      %0 = "tf.ReadVariableOp"(%arg1) {device = "/device:CPU:0"} : (tensor<*x!tf_type.resource>) -> tensor<1x3xf32>
      %1 = "tf.AddV2"(%arg0, %0) {device = "/device:CPU:0"} : (tensor<1x3xf32>, tensor<1x3xf32>) -> tensor<1x3xf32>
      %2 = "tf.Identity"(%1) {device = "/device:CPU:0"} : (tensor<1x3xf32>) -> tensor<1x3xf32>
      func.return %2 : tensor<1x3xf32>
    }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 21K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/tests/legalize-tf-while.mlir

    // CANON:             [[VAL_14:%.*]] = "tf.AddV2"([[VAL_12]], [[VAL_4]])
    // CANON:             [[VAL_15:%.*]] = "tf.AddV2"([[VAL_13]], [[VAL_5]])
    // CANON:             [[VAL_16:%.*]] = "tf.AddV2"([[VAL_11]], [[VAL_4]])
    // CANON:             "tfl.yield"([[VAL_16]], [[VAL_14]], [[VAL_15]]) : (tensor<*xi32>, tensor<*xi32>, tensor<*xf32>) -> ()
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 5K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tensorflow/tests/optimize.mlir

    // CHECK-DAG: %[[cst_0:.*]] = "tf.Const{{.*}} dense<1.200000e+01> : tensor<16xf32>
    // CHECK-NEXT: %[[conv:.*]] = "tf.Conv2D"(%arg0, %[[cst]])
    // CHECK-NEXT: %[[bias:.*]] = "tf.AddV2"(%[[conv]], %[[cst_0]])
    // CHECK-NEXT: return %[[bias]] : tensor<256x8x7x16xf32>
    }
    
    // CHECK-LABEL: convaddv2mul
    func.func @convaddv2mul(%arg: tensor<256x32x32x3xf32>) -> tensor<256x8x7x16xf32> {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Jan 05 18:35:42 UTC 2024
    - 3.3K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/tfrt/tests/tf_to_corert/whileop.mlir

      }
    
      func.func @while_body_add2(%arg0: tensor<i32>, %arg1: tensor<i32>) -> (tensor<i32>, tensor<i32>) {
        %0 = "tf.Const"() {device = "/device:CPU:0", value = dense<1> : tensor<i32>} : () -> tensor<i32>
        %1 = "tf.AddV2"(%arg0, %0) {device = "/device:CPU:0"} : (tensor<i32>, tensor<i32>) -> tensor<i32>
        %2 = "tf.Div"(%arg1, %0) {device = "/device:CPU:0"} : (tensor<i32>, tensor<i32>) -> tensor<i32>
        func.return %1, %2 : tensor<i32>, tensor<i32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 08 00:18:59 UTC 2024
    - 2K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/quantization/tensorflow/tests/fallback_to_flex_ops_legacy.mlir

    }
    
    // CHECK-LABEL: add
    func.func @add(%arg0: tensor<1xf32>, %arg1: tensor<1xf32>) -> tensor<1xf32> {
      %0 = "tf.AddV2"(%arg0, %arg1) : (tensor<1xf32>, tensor<1xf32>) -> tensor<1xf32>
      func.return %0: tensor<1xf32>
    // CHECK: %[[ADD_0:.*]] = "tf.AddV2"(%arg0, %arg1) : (tensor<1xf32>, tensor<1xf32>) -> tensor<1xf32>
    // CHECK: return %[[ADD_0]] : tensor<1xf32>
    }
    
    // CHECK-LABEL: softmax
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 5.8K bytes
    - Viewed (0)
  8. src/runtime/pprof/protomem_test.go

    	"testing"
    )
    
    func TestConvertMemProfile(t *testing.T) {
    	addr1, addr2, map1, map2 := testPCs(t)
    
    	// MemProfileRecord stacks are return PCs, so add one to the
    	// addresses recorded in the "profile". The proto profile
    	// locations are call PCs, so conversion will subtract one
    	// from these and get back to addr1 and addr2.
    	a1, a2 := uintptr(addr1)+1, uintptr(addr2)+1
    	rate := int64(512 * 1024)
    	rec := []profilerecord.MemProfileRecord{
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue May 21 14:38:45 UTC 2024
    - 6.7K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/tensorflow/transforms/optimize.td

    //                  Mul                              AddV2
    // This is to enable the FuseMulAndConv2D pattern.
    // Here, root of the result is AddV2 instead of BiasAdd because the value may
    // not have rank one and therefore the second operand may not have rank one
    // that is required by the BiasAdd. BiasAdd with 'NHWC' data format equivalent
    // to AddV2 op.
    def PassthroughMulAndBiasAdd :
      Pat<(TF_MulOp
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Sat Apr 22 07:31:23 UTC 2023
    - 5.4K bytes
    - Viewed (0)
  10. src/reflect/deepequal.go

    			default:
    				return v.ptr
    			}
    		}
    		addr1 := ptrval(v1)
    		addr2 := ptrval(v2)
    		if uintptr(addr1) > uintptr(addr2) {
    			// Canonicalize order to reduce number of entries in visited.
    			// Assumes non-moving garbage collector.
    			addr1, addr2 = addr2, addr1
    		}
    
    		// Short circuit if references are already seen.
    		typ := v1.Type()
    		v := visit{addr1, addr2, typ}
    		if visited[v] {
    			return true
    		}
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:34:30 UTC 2024
    - 7.4K bytes
    - Viewed (0)
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