MOVV	REGCTXT, (g_sched+gobuf_ctxt)(g)

	// Cannot grow scheduler stack (m->g0).
	MOVV	g_m(g), R7
	MOVV	m_g0(R7), R8
	BNE	g, R8, 3(PC)
	JAL	runtime·badmorestackg0(SB)
	JAL	runtime·abort(SB)

	// Cannot grow signal stack (m->gsignal).
	MOVV	m_gsignal(R7), R8
	BNE	g, R8, 3(PC)
	JAL	runtime·badmorestackgsignal(SB)
	JAL	runtime·abort(SB)

	// Called from f.
	// Set m->morebuf to f's caller.

	LDP	1*16(a_ptr), (R6, R7)
	LDP	2*16(a_ptr), (R8, R9)
	LDP	0*16(b_ptr), (R16, R17)
	LDP	1*16(b_ptr), (R19, R20)
	LDP	2*16(b_ptr), (R21, R22)
	CSEL	EQ, R16, R4, R4
	CSEL	EQ, R17, R5, R5
	CSEL	EQ, R19, R6, R6
	CSEL	EQ, R20, R7, R7
	CSEL	EQ, R21, R8, R8
	CSEL	EQ, R22, R9, R9
	STP	(R4, R5), 0*16(res_ptr)
	STP	(R6, R7), 1*16(res_ptr)
	STP	(R8, R9), 2*16(res_ptr)

	LDP	3*16(a_ptr), (R4, R5)

#include "funcdata.h"
#include "textflag.h"

// This is like race_amd64.s, but for the msan calls.
// See race_amd64.s for detailed comments.

#ifdef GOOS_windows
#define RARG0 CX
#define RARG1 DX
#define RARG2 R8
#define RARG3 R9
#else
#define RARG0 DI
#define RARG1 SI
#define RARG2 DX
#define RARG3 CX
#endif

// func runtime·domsanread(addr unsafe.Pointer, sz uintptr)
// Called from msanread.

#include "funcdata.h"
#include "textflag.h"

// This is like race_amd64.s, but for the asan calls.
// See race_amd64.s for detailed comments.

#ifdef GOOS_windows
#define RARG0 CX
#define RARG1 DX
#define RARG2 R8
#define RARG3 R9
#else
#define RARG0 DI
#define RARG1 SI
#define RARG2 DX
#define RARG3 CX
#endif

// Called from instrumented code.
// func runtime·doasanread(addr unsafe.Pointer, sz, sp, pc uintptr)

	RET

TEXT runtime·mmap(SB),NOSPLIT,$0
	MOVQ	addr+0(FP), DI		// arg 1 - addr
	MOVQ	n+8(FP), SI		// arg 2 - len
	MOVL	prot+16(FP), DX		// arg 3 - prot
	MOVL	flags+20(FP), R10		// arg 4 - flags
	MOVL	fd+24(FP), R8		// arg 5 - fd
	MOVL	off+28(FP), R9
	SUBQ	$16, SP
	MOVQ	R9, 8(SP)		// arg 7 - offset (passed on stack)
	MOVQ	$0, R9			// arg 6 - pad
	MOVL	$197, AX
	SYSCALL
	JCC	ok
	ADDQ	$16, SP
	MOVQ	$0, p+32(FP)

// A brief recap of the amd64 calling convention.
// Arguments are passed in DI, SI, DX, CX, R8, R9, the rest is on stack.
// Callee-saved registers are: BX, BP, R12-R15.
// SP must be 16-byte aligned.
// On Windows:
// Arguments are passed in CX, DX, R8, R9, the rest is on stack.
// Callee-saved registers are: BX, BP, DI, SI, R12-R15.

	oldmask       uint32
	r0            uint32
	r1            uint32
	r2            uint32
	r3            uint32
	r4            uint32
	r5            uint32
	r6            uint32
	r7            uint32
	r8            uint32
	r9            uint32
	r10           uint32
	fp            uint32
	ip            uint32
	sp            uint32
	lr            uint32
	pc            uint32
	cpsr          uint32

    - 'Caching': features/caching.md
    - 'Connections': features/connections.md
    - 'Events': features/events.md
    - 'HTTPS': features/https.md
    - 'Interceptors': features/interceptors.md
    - 'R8/Proguard': features/r8_proguard.md
  - 'Recipes': recipes.md
  - 'Security':
    - 'Security': security/security.md
    - 'Providers': security/security_providers.md

	BYTE	$0x00
	BYTE	$0x90
	SUBW	$0x1A0000, R5
	SLD	$3, R0, R3
	MOVD	$·powtm<>+0(SB), R4
	MOVH	$0x0, R8
	ANDW	$0x7FF00000, R2
	ORW	R5, R1
	WORD	$0x5A234000	//a	%r2,0(%r3,%r4)
	MOVD	$0x3FF0000000000000, R5
	RISBGZ	$40, $63, $56, R2, R3
	RISBGN	$0, $31, $32, R2, R8
	ORW	$0x45000000, R3
	MOVW	R1, R6
	CMPBLT	R6, $0, L42
	FMOVD	F0, F4
L2:
	VLVGF	$0, R3, V1
	MOVD	$·pow_xa<>+0(SB), R2

	print("r2   ", hex(r.x[2]), "\n")
	print("r3   ", hex(r.x[3]), "\n")
	print("r4   ", hex(r.x[4]), "\n")
	print("r5   ", hex(r.x[5]), "\n")
	print("r6   ", hex(r.x[6]), "\n")
	print("r7   ", hex(r.x[7]), "\n")
	print("r8   ", hex(r.x[8]), "\n")
	print("r9   ", hex(r.x[9]), "\n")
	print("r10  ", hex(r.x[10]), "\n")
	print("r11  ", hex(r.x[11]), "\n")
	print("r12  ", hex(r.x[12]), "\n")
	print("r13  ", hex(r.x[13]), "\n")