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Results 51 - 60 of 134 for conv_2d (0.13 sec)

  1. tensorflow/compiler/mlir/tensorflow/transforms/tpu_space_to_depth_pass.cc

        }
      }
    
      // Handle Conv2D input, stride and filter.
      HandleConv2DInput(conv2d, block_size);
      HandleConv2DStride(conv2d);
      HandleConv2DFilter(conv2d, block_size);
    
      // Book keeping new filter shape for backprop filter rewrite.
      // Filter shape is defined in HandleConv2DFilter, thus it is RankedTensorType.
      filter_shape =
          mlir::cast<RankedTensorType>(conv2d.getFilter().getType()).getShape();
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 29.3K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/quantization/tensorflow/ops/tf_op_quant_spec.cc

          if (function_name.contains("with_bias")) {
            spec->biases_params[2] = {{0, 1},
                                      quant::GetUniformQuantizedTypeForBias};
          }
        } else if (function_name.contains("conv2d")) {
          spec->coeff_op_quant_dim[1] = 3;
          if (function_name.contains("with_bias")) {
            spec->biases_params[2] = {{0, 1},
                                      quant::GetUniformQuantizedTypeForBias};
          }
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 6.3K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/lite/tests/dilated-conv.mlir

      %1 = "tf.SpaceToBatchND"(%arg0, %cst, %cst_0) : (tensor<1x128x128x3xf32>, tensor<2xi32>, tensor<2x2xi32>) -> tensor<4x68x68x3xf32>
      %2 = "tf.Conv2D"(%0, %arg1) {padding = "VALID", strides = [1, 1, 1, 1]} : (tensor<4x68x68x3xf32>, tensor<5x5x3x8xf32>) -> tensor<4x64x64x8xf32>
      %3 = "tf.Conv2D"(%1, %arg1) {padding = "VALID", strides = [1, 1, 1, 1]} : (tensor<4x68x68x3xf32>, tensor<5x5x3x8xf32>) -> tensor<4x64x64x8xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 44.7K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/quantization/tensorflow/tests/fake_quant_e2e_xla.mlir

        return %3 : tensor<?x?x?x2xf32>
      }
    
    // CHECK-LABEL: func @conv_with_dynamic_shape
    // The Conv2D should not be quantized since it has dynamic channel.
    // CHECK: "tf.Conv2D"
    // CHECK-SAME: (tensor<?x?x?x?xf32>, tensor<2x3x3x2xf32>) -> tensor<?x?x?x2xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 7.2K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nchw.mlir

      // CHECK: %[[ARG_PERM:.*]] = "tf.Const"() <{value = dense<[0, 3, 1, 2]> : tensor<4xi64>}>
      // CHECK: %[[ARG_TRANSPOSE:[0-9]*]] = "tf.Transpose"(%arg0, %[[ARG_PERM]])
    
      // CHECK: %[[CONV2D:[0-9]*]] = "tf.Conv2D"(%[[ARG_TRANSPOSE]], %arg1)
      // CHECK-SAME: data_format = "NCHW"
      // CHECK-SAME: dilations = [1, 4, 2, 3]
      // CHECK-SAME: explicit_paddings = [1, 2, 7, 8, 3, 4, 5, 6]
      // CHECK-SAME: padding = "EXPLICIT"
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 9K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/quantization/tensorflow/tests/quantize_composite_functions_xla.mlir

      }
      func.func private @composite_conv2d_with_bias_and_relu6_fn_1(%arg0: tensor<*xf32>, %arg1: tensor<*xf32>, %arg2: tensor<2xf32>) -> tensor<*xf32> attributes {tf_quant.composite_function} {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Jan 08 01:16:10 UTC 2024
    - 25.2K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/quantization/tensorflow/tests/quantize_composite_functions.mlir

      }
      func.func private @composite_conv2d_with_bias_and_relu6_fn_2(%arg0: tensor<*xf32>, %arg1: tensor<*xf32>, %arg2: tensor<2xf32>) -> tensor<*xf32> attributes {tf_quant.composite_function} {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Nov 06 01:23:21 UTC 2023
    - 15.2K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/lite/transforms/dilated_conv.h

    //
    //
    //   SpaceToBatchND -> Expand -> Conv2D -> Squeeze -> BatchToSpaceND -> BiasAdd
    //
    //   SpaceToBatchND -> Expand -> Conv2D -> Squeeze -> Pad -> BatchToSpaceND ->
    //   BiasAdd
    //
    //   SpaceToBatchND -> Expand -> Conv2D -> Squeeze -> BiasAdd -> BatchToSpaceND
    //
    //   SpaceToBatchND -> Conv2D -> Pad -> BatchToSpaceND -> BiasAdd
    //
    //   SpaceToBatchND -> Conv2D -> BatchToSpaceND -> BiasAdd
    //
    //
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 20K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/tensorflow/tests/fused_kernel_matcher.mlir

    // RUN: tf-opt %s -tf-fused-kernel-matcher | FileCheck %s
    
    //===----------------------------------------------------------------------===//
    // Conv2D + BiasAdd + <Activation> fusions.
    //===----------------------------------------------------------------------===//
    
    // CHECK-LABEL: conv2DBiasAdd_noActivation
    func.func @conv2DBiasAdd_noActivation(%arg0: tensor<128xf32>, %arg1: tensor<1x1x3x128xf32>, %arg2: tensor<8x32x32x3xf32>) -> (tensor<*xf32>) {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 13.2K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/tensorflow/tests/optimize.mlir

      %filter = arith.constant dense<2.0> : tensor<3x3x3x16xf32>
      %bias = arith.constant dense<3.0> : tensor<16xf32>
      %value = arith.constant dense<4.0> : tensor<16xf32>
      %0 = "tf.Conv2D"(%arg, %filter) {T = "tfdtype$DT_FLOAT", data_format = "NHWC", dilations = [1, 2, 3, 1], padding = "SAME", strides = [1, 4, 5, 1]} : (tensor<256x32x32x3xf32>, tensor<3x3x3x16xf32>) -> tensor<256x8x7x16xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Jan 05 18:35:42 UTC 2024
    - 3.3K bytes
    - Viewed (0)
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