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Results 31 - 40 of 152 for conv2 (0.05 sec)

  1. tensorflow/compiler/mlir/lite/transforms/dilated_conv.h

    //
    //
    //   SpaceToBatchND -> Expand -> Conv2D -> Squeeze -> BatchToSpaceND -> BiasAdd
    //
    //   SpaceToBatchND -> Expand -> Conv2D -> Squeeze -> Pad -> BatchToSpaceND ->
    //   BiasAdd
    //
    //   SpaceToBatchND -> Expand -> Conv2D -> Squeeze -> BiasAdd -> BatchToSpaceND
    //
    //   SpaceToBatchND -> Conv2D -> Pad -> BatchToSpaceND -> BiasAdd
    //
    //   SpaceToBatchND -> Conv2D -> BatchToSpaceND -> BiasAdd
    //
    //
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 20K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/stablehlo/tests/legalize-tfl-stablehlo-conv.mlir

    Michael Levesque-Dion <******@****.***> 1706075999 -0800
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Jan 24 06:08:43 UTC 2024
    - 1.6K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/quantization/stablehlo/tests/bridge/optimize.mlir

        %zp_offset: tensor<?x2x2x1xi32>, %bias: tensor<1xi32>
      ) -> tensor<?x2x2x1xi32> {
      // CHECK-DAG: %[[conv:.*]] = mhlo.convolution
      // CHECK-DAG: %[[combined:.*]] = chlo.broadcast_add %[[zp_offset:.*]], %[[bias:.*]]
      // CHECK-DAG: %[[result:.*]] = chlo.broadcast_add %[[conv]], %[[combined]]
      // CHECK: return %[[result]]
      %0 = mhlo.convolution(%lhs, %rhs)
          dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f],
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Sat Feb 24 02:26:47 UTC 2024
    - 10.7K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/stablehlo/tests/legalize_hlo.mlir

    // CHECK:           %[[CONV:.*]] = "tf.Conv2D"(%[[SLICED_ARG0]], %[[ARG1]])
    // CHECK-SAME:      explicit_paddings = [0, 0, 4, 0, 0, 2, 0, 0]
    // CHECK-SAME:      (tensor<128x5x4x64xf32>, tensor<3x2x64x4xf32>) -> tensor<128x4x3x4xf32>
    // CHECK:           return %[[CONV]] : tensor<128x4x3x4xf32>
    // CHECK:         }
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 29 07:26:59 UTC 2024
    - 340.2K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/lite/tests/quantize-dynamic-range.mlir

      %b = arith.constant dense<-1.23697901> : tensor<64xf32>
      %conv = "tfl.conv_2d"(%arg0, %w, %b) {dilation_h_factor = 1 : i32, dilation_w_factor = 1 : i32, fused_activation_function = "NONE", padding = "SAME", stride_h = 2 : i32, stride_w = 2 : i32} : (tensor<1x224x224x3xf32>, tensor<64x3x3x3xf32>, tensor<64xf32>) -> tensor<1x112x112x64xf32>
      func.return %conv : tensor<1x112x112x64xf32>
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 23 21:09:00 UTC 2024
    - 23.2K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/quantization/tensorflow/tests/quantize_composite_functions_xla.mlir

      }
      func.func private @composite_conv2d_with_bias_and_relu6_fn_1(%arg0: tensor<*xf32>, %arg1: tensor<*xf32>, %arg2: tensor<2xf32>) -> tensor<*xf32> attributes {tf_quant.composite_function} {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Jan 08 01:16:10 UTC 2024
    - 25.2K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/quantization/tensorflow/tests/lift_quantizable_spots_as_functions_drq.mlir

      %cst = "tf.Const"() {value = dense<0.000000e+00> : tensor<2xf32>} : () -> tensor<2xf32>
      %cst_1 = "tf.Const"() {value = dense<3.000000e+00> : tensor<2x3x3x2xf32>} : () -> tensor<2x3x3x2xf32>
      %0 = "tf.Conv2D"(%arg0, %cst_1) {
        data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [],
        padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 11.8K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/walk/builtin.go

    		return mkcall("countrunes", n.Type(), init, typecheck.Conv(n.X.(*ir.ConvExpr).X, types.Types[types.TSTRING]))
    	}
    	if isByteCount(n) {
    		conv := n.X.(*ir.ConvExpr)
    		walkStmtList(conv.Init())
    		init.Append(ir.TakeInit(conv)...)
    		_, len := backingArrayPtrLen(cheapExpr(conv.X, init))
    		return len
    	}
    	if isChanLenCap(n) {
    		name := "chanlen"
    		if n.Op() == ir.OCAP {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 08 22:35:22 UTC 2024
    - 31.2K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nhwc.mlir

      // CHECK: %[[ARG_PERM:.*]] = "tf.Const"() <{value = dense<[0, 2, 3, 1]> : tensor<4xi64>}>
      // CHECK: %[[ARG_TRANSPOSE:[0-9]*]] = "tf.Transpose"(%arg0, %[[ARG_PERM]])
    
      // CHECK: %[[CONV2D:[0-9]*]] = "tf.Conv2D"(%[[ARG_TRANSPOSE]], %arg1)
      // CHECK-SAME: data_format = "NHWC"
      // CHECK-SAME: dilations = [1, 3, 4, 2]
      // CHECK-SAME: explicit_paddings = [1, 2, 5, 6, 7, 8, 3, 4]
      // CHECK-SAME: padding = "EXPLICIT"
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 4.5K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/quantization/tensorflow/tests/lift_quantizable_spots_as_functions.mlir

      %0 = "tf.Conv2D"(%arg0, %arg1) {
        data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [],
        padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true
      } : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<*xf32>
      %1 = "tf.Relu6"(%0) {device = ""} : (tensor<*xf32>) -> tensor<*xf32>
    
    
      %3 = "tf.Conv2D"(%arg0, %arg1) {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri May 10 04:07:09 UTC 2024
    - 26.5K bytes
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