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Results 31 - 32 of 32 for V18 (0.03 sec)
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tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir
// CHECK-DAG: %[[V18:.*]] = mhlo.subtract %[[V11]], %[[V2]] : tensor<1x22x128xi32> // CHECK-DAG: %[[V19:.*]] = mhlo.negate %[[V18]] : tensor<1x22x128xi32> // CHECK-DAG: %[[V20:.*]] = mhlo.minimum %[[V18]], %[[V5]] : tensor<1x22x128xi32> // CHECK-DAG: %[[V21:.*]] = mhlo.add %[[V13]], %[[V20]] : tensor<1x22x128xi32> // CHECK-DAG: %[[V22:.*]] = mhlo.maximum %[[V18]], %[[V5]] : tensor<1x22x128xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon May 06 18:46:23 UTC 2024 - 335.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewritegeneric.go
v17 := b.NewValue0(v.Pos, OpDiv32u, typ.UInt32) v18 := b.NewValue0(v.Pos, OpAdd32, typ.UInt32) v19 := b.NewValue0(v.Pos, OpMod32u, typ.UInt32) v19.AddArg2(v11, v8) v20 := b.NewValue0(v.Pos, OpMul32, typ.UInt32) v21 := b.NewValue0(v.Pos, OpConst32, typ.UInt32) v21.AuxInt = int32ToAuxInt(int32((1 << 32) % c)) v20.AddArg2(v14, v21) v18.AddArg2(v19, v20) v17.AddArg2(v18, v8) v16.AddArg(v17) v.AddArg2(v0, v16)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 22 18:24:47 UTC 2024 - 812.2K bytes - Viewed (0)