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Results 21 - 30 of 31 for logical_or (0.3 sec)
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tensorflow/compiler/mlir/tensorflow/tests/lower_tf.mlir
// CHECK-DAG: %[[VAL19:.*]] = "tf.LogicalAnd"(%[[VAL13]], %[[VAL18]]) : (tensor<i1>, tensor<i1>) -> tensor<i1> // CHECK-DAG: %[[VAL20:.*]] = "tf.LogicalOr"(%[[VAL12]], %[[VAL19]]) : (tensor<i1>, tensor<i1>) -> tensor<i1> // CHECK-DAG: %[[VAL21:.*]] = "tf.AddV2"(%[[VAL10]], %[[VAL3]]) : (tensor<f32>, tensor<f32>) -> tensor<f32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Jan 05 18:35:42 UTC 2024 - 92K bytes - Viewed (0) -
tensorflow/compiler/jit/mark_for_compilation_pass.cc
"MulNoNan", "FloorDiv", "Xlogy", "Xlog1py", "Xdivy", "FloorMod", "BitwiseAnd", "BitwiseOr", "BitwiseXor", "LeftShift", "RightShift", "LogicalAnd", "LogicalOr", "Mod", "Maximum", "Minimum", "RealDiv", "ReciprocalGrad", "RsqrtGrad", "SqrtGrad", "TruncateDiv", "TruncateMod", "Equal", "NotEqual", "Greater", "GreaterEqual",
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Feb 21 12:19:41 UTC 2024 - 85.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_space_to_depth_pass.mlir
%5 = "tf.Less"(%arg2, %arg4) {device = ""} : (tensor<i32>, tensor<i32>) -> tensor<i1> %6 = "tf.LogicalAnd"(%1, %5) {device = ""} : (tensor<i1>, tensor<i1>) -> tensor<i1> %7 = "tf.LogicalOr"(%6, %4) {device = ""} : (tensor<i1>, tensor<i1>) -> tensor<i1> %8 = "tf.Less"(%arg0, %arg1) {device = ""} : (tensor<i32>, tensor<i32>) -> tensor<i1>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 37.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/schema/schema_generated.h
"SUM", "SQRT", "RSQRT", "SHAPE", "POW", "ARG_MIN", "FAKE_QUANT", "REDUCE_PROD", "REDUCE_MAX", "PACK", "LOGICAL_OR", "ONE_HOT", "LOGICAL_AND", "LOGICAL_NOT", "UNPACK", "REDUCE_MIN", "FLOOR_DIV", "REDUCE_ANY", "SQUARE", "ZEROS_LIKE", "FILL", "FLOOR_MOD", "RANGE",
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 21 18:21:50 UTC 2024 - 1M bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_ops.td
Placeholder for a device ordinal that depends on its tf_device.replicate ancestor. }]; let description = [{ This op must have a tf_device.replicate ancestor. The ancestor replica_id and logical_core attribute correspond to a TPU core. This op maps the TPU core to a device_ordinal, where the device ordinal is the index of the core relative to its host.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Apr 24 04:08:35 UTC 2024 - 90.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/extract_outside_compilation.mlir
// CHECK: %[[PROGRAM0:.+]] = "tf._XlaCompileMlirPlaceholderProgramKey" // CHECK: %[[DEVICE0:.+]] = "tf._TPUDeviceOrdinalPlaceholder" // CHECK-SAME: logical_core = 0 // CHECK: %[[RECV0:.+]] = "tf._XlaRecvAtHostV2"(%[[PROGRAM0]], %[[DEVICE0]]) // CHECK-SAME: key = "host_compute_channel_0_args" // CHECK-SAME: _xla_has_host_transfer = true
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Oct 31 08:59:10 UTC 2023 - 129.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/legalize_hlo.mlir
} // CHECK-LABEL: func @or( // CHECK-SAME: %[[VAL_0:.*]]: tensor<2xi1>, // CHECK-SAME: %[[VAL_1:.*]]: tensor<2xi1>) -> tensor<2xi1> { // CHECK: %[[VAL_2:.*]] = "tf.LogicalOr"(%[[VAL_0]], %[[VAL_1]]) : (tensor<2xi1>, tensor<2xi1>) -> tensor<2xi1> // CHECK: return %[[VAL_2]] : tensor<2xi1> // CHECK: } func.func @or(%arg0: tensor<2xi1>, %arg1: tensor<2xi1>) -> tensor<2xi1> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 29 07:26:59 UTC 2024 - 340.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/transforms/optimize_patterns.td
$input1, $input2), (replaceWithValue $input2), [(HaveSameType $input2, $result), (AllElementsAreBool<"false"> $constant)]>; // select(logical_not(C), A, B) -> select(C, B, A) def Optimize#SelectOp#Not : Pat< (SelectOp (TFL_LogicalNotOp $condition), $input1, $input2), (SelectOp $condition, $input2, $input1)>;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 16 20:31:41 UTC 2024 - 66.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/side-effect-analysis-test.mlir
// expected-remark@above {{ID: 5}} %island = tf_executor.island { // expected-remark@above {{ID: 3}} // expected-remark@above {{Successors: {4}}} "tf._TPUDeviceOrdinalPlaceholder"() {logical_core = 0} : () -> tensor<i64> // expected-remark@above {{ID: 0}} "tf._UnknownSideEffectingOp_"() : () -> () // expected-remark@above {{ID: 1}} // expected-remark@above {{Successors: {2}}}
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Dec 20 04:39:18 UTC 2023 - 129.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/ir/tfl_ops.cc
/// possible. /// The function currently asserts that the `result_type` to be a f32 tensor /// type. /// TODO: Extend this function to handle integral tensor for ops like /// "tfl.logical_not". Attribute ConstFoldUnaryOp(Type result_type, Attribute operand, llvm::function_ref<APFloat(APFloat)> calculate) { assert(IsF32ShapedType(result_type) || IsBF16ShapedType(result_type));
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 169.2K bytes - Viewed (0)