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Results 11 - 20 of 22 for filter_width (0.41 sec)

  1. tensorflow/compiler/mlir/lite/tests/prepare-quantize.mlir

      %0 = "tfl.dequantize"(%arg0) : (tensor<1x6x6x16x!quant.uniform<u8:f32, 7.812500e-03:128>>) -> tensor<1x6x6x16xf32>
      %1 = "tfl.average_pool_2d"(%0) {
          name = "avgpool", filter_height = 3 : i32, filter_width = 6 : i32, fused_activation_function = "NONE", padding = "VALID", stride_h = 3 : i32, stride_w = 1 : i32
        } : (tensor<1x6x6x16xf32>) -> tensor<1x1x1x16xf32>
      func.return %1 : tensor<1x1x1x16xf32>
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 67.5K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/transforms/prepare_tf.cc

      /// format to TFLite DepthwiseConv2D op filter data format and return Value
      /// for the converted filter.  TensorFlow filter data format is
      /// [filter_height, filter_width, in_channels, channel_multiplier] and TFLite
      /// filter data format is [1, filter_height, filter_width, out_channels].
      /// Requires that filter is verified by the match method that it is a 4-D
      /// RankedTensorType.
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 28 21:49:50 UTC 2024
    - 64.6K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/lite/tests/ops.mlir

    ^bb0(%arg0: tensor<256x32x32x3xf32>):
      // CHECK: "tfl.max_pool_2d"(%arg0) <{filter_height = 1 : i32, filter_width = 1 : i32, fused_activation_function = "RELU6", padding = "SAME", stride_h = 1 : i32, stride_w = 1 : i32}> : (tensor<256x32x32x3xf32>) -> tensor<?xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jun 06 19:09:08 UTC 2024
    - 189.2K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/tests/legalize-tf.mlir

      %6 = arith.addf %2, %5 : tensor<1x1x1x16xf32>
      func.return %6 : tensor<1x1x1x16xf32>
    
    // CHECK-LABEL: func @avgPool2D
    // CHECK:  "tfl.average_pool_2d"(%arg0) <{filter_height = 3 : i32, filter_width = 6 : i32, fused_activation_function = "NONE", padding = "VALID", stride_h = 3 : i32, stride_w = 1 : i32}> : (tensor<1x6x6x16xf32>) -> tensor<1x1x1x16xf32>
    // CHECK:  %1 = "tf.AvgPool"(%arg0)
    // CHECK:  %2 = "tf.AvgPool"(%arg0)
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Jun 05 01:54:33 UTC 2024
    - 153.4K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tensorflow/ir/tf_generated_ops.td

    `[filter_height, filter_width, in_channels, out_channels]`, this op
    performs the following:
    
    1. Flattens the filter to a 2-D matrix with shape
       `[filter_height * filter_width * in_channels, output_channels]`.
    2. Extracts image patches from the input tensor to form a *virtual*
       tensor of shape `[batch, out_height, out_width,
       filter_height * filter_width * in_channels]`.
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 23:24:08 UTC 2024
    - 793K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo.cc

                  conv_output_type, rewriter);
        }
        Value output;
        if (is_depthwise_conv && num_spatial_dims == 2) {
          // Reshapes filter format to [filter_height, filter_width, in_channels,
          // channel_multiplier] from HLO's [filter_height, filter_width, 1,
          // in_channels * channel_multiplier] format.
          auto filter_type = mlir::cast<ShapedType>(rhs.getType());
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 154.9K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/tests/optimize.mlir

      %1 = "tfl.relu"(%0) : (tensor<1x73x73x16xf32>) -> tensor<1x73x73x16xf32>
      func.return %1 : tensor<1x73x73x16xf32>
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 16 20:31:41 UTC 2024
    - 284.1K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/lite/schema/schema_generated.h

      auto _stride_w = _o->stride_w;
      auto _stride_h = _o->stride_h;
      auto _filter_width = _o->filter_width;
      auto _filter_height = _o->filter_height;
      auto _fused_activation_function = _o->fused_activation_function;
      return tflite::CreatePool2DOptions(
          _fbb,
          _padding,
          _stride_w,
          _stride_h,
          _filter_width,
          _filter_height,
          _fused_activation_function);
    }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 21 18:21:50 UTC 2024
    - 1M bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/lite/ir/tfl_ops.td

      let description = [{
        Performs average-pooling operation on input.
      }];
    
      let arguments = (
        ins TFL_TensorOf<[F32, QI8, QUI8, QI16]>:$input,
        I32Attr:$filter_height,
        I32Attr:$filter_width,
        TFL_PaddingAttr:$padding,
        I32Attr:$stride_h,
        I32Attr:$stride_w,
        TFL_AFAttr:$fused_activation_function
      );
    
      let results = (outs TFL_TensorOf<[F32, QI8, QUI8, QI16]>:$output);
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jun 06 19:09:08 UTC 2024
    - 186K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/lite/stablehlo/tests/uniform-quantized-stablehlo-to-tfl.mlir

    // CHECK-SAME: %[[ARG1:.*]]: tensor<!quant.uniform<i8:f32, 3.000000e-01:-5>>
    // CHECK: %[[MAX_POOL:.*]] = "tfl.max_pool_2d"(%[[ARG0]])
    // CHECK-SAME: {filter_height = 3 : i32, filter_width = 4 : i32, fused_activation_function = "NONE", padding = "VALID", stride_h = 2 : i32, stride_w = 3 : i32}
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 14 17:10:32 UTC 2024
    - 106.2K bytes
    - Viewed (0)
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