case "F":
		if 0 <= n && n <= 31 {
			return mips.REG_F0 + n, true
		}
	case "FCR":
		if 0 <= n && n <= 31 {
			return mips.REG_FCR0 + n, true
		}
	case "M":
		if 0 <= n && n <= 31 {
			return mips.REG_M0 + n, true
		}
	case "R":
		if 0 <= n && n <= 31 {
			return mips.REG_R0 + n, true
		}
	case "W":
		if 0 <= n && n <= 31 {
			return mips.REG_W0 + n, true
		}
	}
	return 0, false

			// the CR bit.
			prog.Reg = a[1].Reg
			if a[1].Type != obj.TYPE_REG {
				// The CR bit is represented as a constant 0-31. Convert it to a Reg.
				c := p.getConstant(prog, op, &a[1])
				reg, success := ppc64.ConstantToCRbit(c)
				if !success {
					p.errorf("invalid CR bit register number %d", c)
				}
				prog.Reg = reg
			}
			break
		}

			"\tb\\",
			"\tc",
			"before",
			"A(1, 2, 3)",
			"after",
		),
		"before.\n.1.\n.2.\n.3.\n.after.\n",
	},
	{
		"LOAD macro",
		lines(
			"#define LOAD(off, reg) \\",
			"\tMOVBLZX	(off*4)(R12),	reg \\",
			"\tADDB	reg,		DX",
			"",
			"LOAD(8, AX)",
		),
		"\n.\n.MOVBLZX.(.8.*.4.).(.R12.).,.AX.\n.ADDB.AX.,.DX.\n",
	},
	{
		"nested multiline macro",
		lines(

pkg syscall (freebsd-386-cgo), const DT_DIR ideal-int
pkg syscall (freebsd-386-cgo), const DT_FIFO ideal-int
pkg syscall (freebsd-386-cgo), const DT_LNK ideal-int
pkg syscall (freebsd-386-cgo), const DT_REG ideal-int
pkg syscall (freebsd-386-cgo), const DT_SOCK ideal-int
pkg syscall (freebsd-386-cgo), const DT_UNKNOWN ideal-int
pkg syscall (freebsd-386-cgo), const DT_WHT ideal-int