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Results 61 - 63 of 63 for Constraint (0.13 sec)

  1. platforms/documentation/docs/src/docs/userguide/optimizing-performance/configuration_cache.adoc

    === Performance improvements
    
    Apart from skipping the configuration phase, the configuration cache provides some additional performance improvements:
    
    - All tasks run in parallel by default, subject to dependency constraints.
    - Dependency resolution is cached.
    - Configuration state and dependency resolution state is discarded from heap after writing the task graph. This reduces the peak heap usage required for a given set of tasks.
    
    Registered: Wed Jun 12 18:38:38 UTC 2024
    - Last Modified: Fri Mar 29 16:24:12 UTC 2024
    - 71.1K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/loong64/asm.go

    		rk := p.From.Reg
    		rj := p.To.Reg
    		rd := p.RegTo2
    
    		// See section 2.2.7.1 of https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html
    		// for the register usage constraints.
    		if rd == rj || rd == rk {
    			c.ctxt.Diag("illegal register combination: %v\n", p)
    		}
    		o1 = OP_RRR(atomicInst[p.As], uint32(rk), uint32(rj), uint32(rd))
    	}
    
    	out[0] = o1
    	out[1] = o2
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 61.8K bytes
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  3. src/runtime/mheap.go

    // they're fresh from the operating system. It updates heapArena metadata that is
    // critical for future page allocations.
    //
    // There are no locking constraints on this method.
    func (h *mheap) allocNeedsZero(base, npage uintptr) (needZero bool) {
    	for npage > 0 {
    		ai := arenaIndex(base)
    		ha := h.arenas[ai.l1()][ai.l2()]
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 22:31:00 UTC 2024
    - 78K bytes
    - Viewed (0)
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