// RUN: tf-opt %s -split-input-file -verify-diagnostics --tf-tpu-rewrite=tpu-compile-metadata-debug | FILECHECK_OPTS="" FileCheck %s

// Tests module with missing `tf.versions` attribute.

// expected-error@+1 {{requires attribute 'tf.versions'}}
module attributes {tf.devices = ["/job:worker/replica:0/task:0/device:CPU:0", "/job:worker/replica:0/task:0/device:TPU_SYSTEM:0", "/job:worker/replica:0/task:0/device:TPU:0"]} {
  func.func @missing_tf_versions() {

	=> (EXTRWconst [32-c] x2 x)
(XORshiftLL <t> [c] (UBFX [bfc] x) x2) && c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)
	=> (EXTRWconst [32-c] x2 x)

// Rewrite special pairs of shifts to AND.
// On ARM64 the bitmask can fit into an instruction.
(SRLconst [c] (SLLconst [c] x)) && 0 < c && c < 64 => (ANDconst [1<<uint(64-c)-1] x) // mask out high bits

          auto str = mlir::cast<mlir::StringAttr>(path_element);
          os << str.getValue();
        }
      }
      os << "\n";
    }
  }
}

// For exported functions with bound inputs, rewrite the function
// signature to match the requirements of tf_saved_model bound input args.
//
// The raw imported functions have `tensor<*x!tf_type.resource>` as the type for

3-Sealed-Key":"IAAfAPQDKxzfH4gThOWe/wQz7xfWZnEviUo4s+S91mbo3X2duwfMAtOJag==","X-Minio-Internal-Server-Side-Encryption-Seal-Algorithm":"DAREv2-HMAC-SHA256","content-type":"application/octet-stream"}},{"Bucket":"buck1","Name":"go_113/src/cmd/gofmt/rewrite.go","UserDef":{"X-Minio-Internal-Server-Side-Encryption-Iv":"H6huCivGUqQrvyDUDJYM=","X-Minio-Internal-Server-Side-Encryption-S3-Kms-Key-Id":"my-minio-key","X-Minio-Internal-Server-Side-Encryption-S3-Kms-Sealed-Key":"IAAfAOmf/TQYqrmTKVz3tOOsrqcwR/...

// but saved in Offset which type is int64, con32class treats it as uint32 type and reclassifies it.
func (c *ctxt7) con32class(a *obj.Addr) int {
	v := uint32(a.Offset)
	// For 32-bit instruction with constant, rewrite
	// the high 32-bit to be a repetition of the low
	// 32-bit, so that the BITCON test can be shared
	// for both 32-bit and 64-bit. 32-bit ops will
	// zero the high 32-bit of the destination register
	// anyway.

	MCAST_MSFILTER                              = 0x30
	MCAST_UNBLOCK_SOURCE                        = 0x2c
	MEMGETREGIONINFO                            = 0xc0104d08
	MEMREADOOB64                                = 0xc0184d16
	MEMWRITE                                    = 0xc0304d18
	MEMWRITEOOB64                               = 0xc0184d15
	MFD_ALLOW_SEALING                           = 0x2
	MFD_CLOEXEC                                 = 0x1