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Results 21 - 30 of 38 for Shift2 (0.15 sec)
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staging/src/k8s.io/api/storage/v1beta1/generated.pb.go
iNdEx := 0 for iNdEx < l { preIndex := iNdEx var wire uint64 for shift := uint(0); ; shift += 7 { if shift >= 64 { return ErrIntOverflowGenerated } if iNdEx >= l { return io.ErrUnexpectedEOF } b := dAtA[iNdEx] iNdEx++ wire |= uint64(b&0x7F) << shift if b < 0x80 { break } } fieldNum := int32(wire >> 3)
Registered: Sat Jun 15 01:39:40 UTC 2024 - Last Modified: Fri Mar 01 06:06:37 UTC 2024 - 133.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
// S{HL, HR, AR}x: shift operations // SHL: shift left // SHR: shift right logical (0s are shifted in from beyond the word size) // SAR: shift right arithmetic (sign bit is shifted in from beyond the word size) // arg0 is the value being shifted // arg1 is the amount to shift, interpreted mod (Q=64,L=32,W=32,B=32) // (Note: x86 is weird, the 16 and 8 byte shifts still use all 5 bits of shift amount!)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1) -
src/cmd/compile/internal/ssa/_gen/generic.rules
// Non-constant rotate detection. // We use shiftIsBounded to make sure that neither of the shifts are >64. // Note: these rules are subtle when the shift amounts are 0/64, as Go shifts // are different from most native shifts. But it works out.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 16 22:21:05 UTC 2024 - 135.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64.rules
(Not x) => (XOR (MOVDconst [1]) x) // shifts // hardware instruction uses only the low 6 bits of the shift // we compare to 64 to ensure Go semantics for large shifts // Rules about rotates with non-const shift are based on the following rules, // if the following rules change, please also modify the rules based on them. // check shiftIsBounded first, if shift value is proved to be valid then we // can do the shift directly.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
src/cmd/internal/obj/s390x/asmz.go
op_SRA uint32 = 0x8A00 // FORMAT_RS1 SHIFT RIGHT SINGLE (32) op_SRAG uint32 = 0xEB0A // FORMAT_RSY1 SHIFT RIGHT SINGLE (64) op_SRAK uint32 = 0xEBDC // FORMAT_RSY1 SHIFT RIGHT SINGLE (32) op_SRDA uint32 = 0x8E00 // FORMAT_RS1 SHIFT RIGHT DOUBLE op_SRDL uint32 = 0x8C00 // FORMAT_RS1 SHIFT RIGHT DOUBLE LOGICAL op_SRDT uint32 = 0xED41 // FORMAT_RXF SHIFT SIGNIFICAND RIGHT (long DFP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 17:46:09 UTC 2024 - 176.7K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/asm7.go
is64bit := o1 & (1 << 31) if is64bit == 0 && amount >= 32 { c.ctxt.Diag("shift amount out of range 0 to 31: %v", p) } shift := (p.From.Offset >> 22) & 3 if (shift > 2 || shift < 0) && (isADDop(p.As) || isADDWop(p.As) || isNEGop(p.As)) { c.ctxt.Diag("unsupported shift operator: %v", p) } o1 |= uint32(p.From.Offset) /* includes reg, op, etc */ rt := int(p.To.Reg)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 201.1K bytes - Viewed (0) -
doc/go1.17_spec.html
a <a href="#Run_time_panics">run-time panic</a> occurs. The shift operators implement arithmetic shifts if the left operand is a signed integer and logical shifts if it is an unsigned integer. There is no upper limit on the shift count. Shifts behave as if the left operand is shifted <code>n</code> times by 1 for a shift count of <code>n</code>.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Apr 11 20:22:45 UTC 2024 - 211.6K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm9.go
/* Vector shift */ {as: AVS, a1: C_VREG, a2: C_VREG, a6: C_VREG, type_: 82, size: 4}, /* vector shift, vx-form */ {as: AVSA, a1: C_VREG, a2: C_VREG, a6: C_VREG, type_: 82, size: 4}, /* vector shift algebraic, vx-form */ {as: AVSOI, a1: C_U16CON, a2: C_VREG, a3: C_VREG, a6: C_VREG, type_: 83, size: 4}, /* vector shift by octet immediate, va-form */ /* Vector count */
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 13:55:28 UTC 2024 - 156.1K bytes - Viewed (0) -
platforms/software/dependency-management/src/main/resources/org/gradle/api/internal/artifacts/ivyservice/ivyresolve/verification/report/uikit.min.js
yi(t)}):requestAnimationFrame(function(){return yi()})}}function Ii(t){for(var e;e=t.shift();)e()}function Si(t,e){var i=t.indexOf(e);return!!~i&&!!t.splice(i,1)}function Ti(){}Ti.prototype={positions:[],init:function(){var e,t=this;this.positions=[],this.unbind=Ut(document,"mousemove",function(t){return e=re(t,"page")}),this.interval=setInterval(function(){e&&(t.positions.push(e),5<t.positions.length&&t.positions.shift())},50)},cancel:function(){this.unbind&&this.unbind(),this.interval&&clearInterv...
Registered: Wed Jun 12 18:38:38 UTC 2024 - Last Modified: Tue Oct 10 21:10:11 UTC 2023 - 130.5K bytes - Viewed (0) -
src/vendor/golang.org/x/crypto/chacha20poly1305/chacha20poly1305_amd64.s
SUBQ $16, inl // Load for hashing polyAdd(0(inp)) // Load for decryption MOVOU (inp), T0; PXOR T0, A1; MOVOU A1, (oup) LEAQ (1*16)(inp), inp LEAQ (1*16)(oup), oup polyMul // Shift the stream "left" MOVO B1, A1 MOVO C1, B1 MOVO D1, C1 MOVO A2, D1 MOVO B2, A2 MOVO C2, B2 MOVO D2, C2 JMP openSSE128Open openSSETail16: TESTQ inl, inl JE openSSEFinalize
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 29 21:28:33 UTC 2023 - 105.6K bytes - Viewed (0)