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Results 1 - 7 of 7 for Input (0.24 sec)

  1. src/cmd/go/internal/load/pkg.go

    			embedErr := err.(*EmbedError)
    			p.Error.setPos(p.Internal.Build.EmbedPatternPos[embedErr.Pattern])
    		}
    	}
    
    	// Check for case-insensitive collision of input files.
    	// To avoid problems on case-insensitive files, we reject any package
    	// where two different input files have equal names under a case-insensitive
    	// comparison.
    	inputs := p.AllFiles()
    	f1, f2 := str.FoldDup(inputs)
    	if f1 != "" {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue May 28 17:00:51 UTC 2024
    - 120K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

    		{name: "NOTL", argLength: 1, reg: gp11, asm: "NOTL", resultInArg0: true},
    
    		// BS{F,R}Q returns a tuple [result, flags]
    		// result is undefined if the input is zero.
    		// flags are set to "equal" if the input is zero, "not equal" otherwise.
    		// BS{F,R}L returns only the result.
    		{name: "BSFQ", argLength: 1, reg: gp11flags, asm: "BSFQ", typ: "(UInt64,Flags)"},        // # of low-order zeroes in 64-bit arg
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 98K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/s390x/asmz.go

    		switch p.As {
    		default:
    			c.ctxt.Diag("unexpected opcode %v", p.As)
    		case AKM, AKMC, AKLMD:
    			if p.From.Reg == REG_R0 {
    				c.ctxt.Diag("input must not be R0 in %v", p)
    			}
    			if p.From.Reg&1 != 0 {
    				c.ctxt.Diag("input must be even register in %v", p)
    			}
    			if p.To.Reg == REG_R0 {
    				c.ctxt.Diag("second argument must not be R0 in %v", p)
    			}
    			if p.To.Reg&1 != 0 {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 16 17:46:09 UTC 2024
    - 176.7K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/x86/asm6.go

    					r.Type = objabi.R_CALL
    					r.Siz = 4
    					ab.PutInt32(0)
    					break
    				}
    
    				// Assumes q is in this function.
    				// TODO: Check in input, preserve in brchain.
    
    				// Fill in backward jump now.
    				q = p.To.Target()
    
    				if q == nil {
    					ctxt.Diag("jmp/branch/loop without target")
    					ctxt.DiagFlush()
    					log.Fatalf("bad code")
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 15:44:14 UTC 2024
    - 146.9K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/ppc64/asm9.go

    	case C_SOREG:
    		return cmp(C_ZOREG, b)
    
    	case C_LOREG:
    		return cmp(C_SOREG, b)
    
    	case C_XOREG:
    		return cmp(C_REG, b) || cmp(C_ZOREG, b)
    
    	// An even/odd register input always matches the regular register types.
    	case C_REG:
    		return cmp(C_REGP, b) || (b == C_ZCON && r0iszero != 0)
    	case C_FREG:
    		return cmp(C_FREGP, b)
    	case C_VSREG:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 13:55:28 UTC 2024
    - 156.1K bytes
    - Viewed (0)
  6. src/cmd/go/internal/work/exec.go

    			// Ignore error; different assembler versions
    			// are unlikely to make any difference anyhow.
    			fmt.Fprintf(h, "asm %q\n", id)
    		}
    	}
    
    	// Input files.
    	inputFiles := str.StringList(
    		p.GoFiles,
    		p.CgoFiles,
    		p.CFiles,
    		p.CXXFiles,
    		p.FFiles,
    		p.MFiles,
    		p.HFiles,
    		p.SFiles,
    		p.SysoFiles,
    		p.SwigFiles,
    		p.SwigCXXFiles,
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jun 10 14:46:37 UTC 2024
    - 105.6K bytes
    - Viewed (0)
  7. src/cmd/link/internal/ld/data.go

    	var head, tail, zerobase loader.Sym
    	ldr := ctxt.loader
    	sl := make([]symNameSize, len(syms))
    
    	// For ppc64, we want to interleave the .got and .toc sections
    	// from input files. Both are type sym.SELFGOT, so in that case
    	// we skip size comparison and do the name comparison instead
    	// (conveniently, .got sorts before .toc).
    	checkSize := symn != sym.SELFGOT
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Jun 12 15:10:50 UTC 2024
    - 100.5K bytes
    - Viewed (0)
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