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Results 41 - 50 of 198 for ARG1 (0.41 sec)

  1. src/crypto/internal/nistec/fiat/p224_fiat64.go

    	x13 := (uint64(arg1[15]) << 56)
    	x14 := (uint64(arg1[14]) << 48)
    	x15 := (uint64(arg1[13]) << 40)
    	x16 := (uint64(arg1[12]) << 32)
    	x17 := (uint64(arg1[11]) << 24)
    	x18 := (uint64(arg1[10]) << 16)
    	x19 := (uint64(arg1[9]) << 8)
    	x20 := arg1[8]
    	x21 := (uint64(arg1[7]) << 56)
    	x22 := (uint64(arg1[6]) << 48)
    	x23 := (uint64(arg1[5]) << 40)
    	x24 := (uint64(arg1[4]) << 32)
    	x25 := (uint64(arg1[3]) << 24)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 05 21:53:03 UTC 2022
    - 43.2K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go

    		{name: "DIV", argLength: 2, reg: gp21, asm: "DIV", typ: "Int64"}, // arg0 / arg1
    		{name: "DIVU", argLength: 2, reg: gp21, asm: "DIVU", typ: "UInt64"},
    		{name: "DIVW", argLength: 2, reg: gp21, asm: "DIVW", typ: "Int32"},
    		{name: "DIVUW", argLength: 2, reg: gp21, asm: "DIVUW", typ: "UInt32"},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 30.7K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

    		{name: "FMUL", argLength: 2, reg: fp21, asm: "FMUL", commutative: true},   // arg0*arg1
    		{name: "FMULS", argLength: 2, reg: fp21, asm: "FMULS", commutative: true}, // arg0*arg1
    
    		{name: "FMADD", argLength: 3, reg: fp31, asm: "FMADD"},   // arg0*arg1 + arg2
    		{name: "FMADDS", argLength: 3, reg: fp31, asm: "FMADDS"}, // arg0*arg1 + arg2
    		{name: "FMSUB", argLength: 3, reg: fp31, asm: "FMSUB"},   // arg0*arg1 - arg2
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/quantization/tensorflow/tests/fallback_to_flex_ops_default.mlir

    // CHECK-LABEL: bias_add
    func.func @bias_add(%arg0: tensor<1x10x10x32xf32>, %arg1: tensor<32xf32>) -> tensor<1x10x10x32xf32> {
      %0 = "tf.BiasAdd"(%arg0, %arg1) {T = "tfdtype$DT_FLOAT", data_format = "NHWC"} : (tensor<1x10x10x32xf32>, tensor<32xf32>) -> tensor<1x10x10x32xf32>
      func.return %0 : tensor<1x10x10x32xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 13.4K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tensorflow/tests/tpu_validate_inputs.mlir

    func.func @num_replicas_replicated(%arg0: tensor<i32>, %arg1: tensor<i32>, %arg2: tensor<i32>, %arg3: tensor<i32>) -> (tensor<i32>, tensor<i32>) {
      %0:2 = tf_executor.graph {
        %control = tf_executor.island() wraps "tf.TPUReplicateMetadata"() {_tpu_replicate = "cluster", device = "/device:TPU:0", num_replicas = 2, topology = "topology"} : () -> ()
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 07 06:51:01 UTC 2024
    - 15.7K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/tensorflow/tests/functional-control-flow-to-cfg.mlir

    // CHECK:   return
    }
    
    
    // CHECK-LABEL:  func @testComplexWhile1Result(%arg0: tensor<*xf32>, %arg1: tensor<*xf32>) -> tensor<*xf32> {
    func.func @testComplexWhile1Result(%arg0: tensor<*xf32>, %arg1: tensor<*xf32>) -> (tensor<*xf32>) {
      %0 = arith.addf %arg0, %arg1 : tensor<*xf32>
    // CHECK:    [[ADDF:%.+]] = arith.addf %arg0, %arg1 : tensor<*xf32>
    
      %1:2 = "tf.While"(%arg0, %0) {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 12.3K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/quantize/quantize_same_scale.mlir

      // CHECK-SAME: %[[ARG0:.*]]: tensor<1x2xf32>
      // CHECK-SAME: %[[ARG1:.*]]: tensor<2x3xf32>
      func.func private @same_scale_after_composite(%arg0: tensor<1x2xf32>, %arg1: tensor<2x3xf32>) -> tensor<3x1xf32> {
        // CHECK: %[[Q1:.*]] = "quantfork.qcast"(%[[ARG0]]) {volatile} : (tensor<1x2xf32>) -> tensor<1x2x!quant.uniform<i8:f32, 5.000000e-03>>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 14 17:10:32 UTC 2024
    - 35.4K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/quantize/quantize_op_with_region.mlir

        // CHECK-SAME: window_dimensions = array<i64: 1, 3, 3, 1>
        // CHECK: %[[ARG1:.*]]: tensor<!quant.uniform<i8:f32, 3.000000e-01:1>>, %[[ARG2:.*]]: tensor<!quant.uniform<i8:f32, 3.000000e-01:1>>
        // CHECK: %[[MAX:.*]] = stablehlo.maximum %[[ARG1]], %[[ARG2]] : tensor<!quant.uniform<i8:f32, 3.000000e-01:1>>
        // CHECK: stablehlo.return %[[MAX]] : tensor<!quant.uniform<i8:f32, 3.000000e-01:1>>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 18 20:32:46 UTC 2024
    - 18.9K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/lite/experimental/tac/README.md

    In this pass, subgraph is actually implemented with `FuncOp`.
    
    Take the following code as an example:
    
    ```
    func @simpleTest(%arg0: tensor<1xf32>, %arg1: tensor<1xf32>, %arg2: tensor<1xf32>, %arg3: tensor<1xf32>) -> tensor<2x1xf32> {
      %0 = "tfl.add"(%arg0, %arg1) {tac.device = "GPU", fused_activation_function = "RELU6", tac.inference_type = "FLOAT"} : (tensor<1xf32>, tensor<1xf32>) -> tensor<1xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Mar 29 18:32:13 UTC 2022
    - 11.6K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/lite/tests/tfl_while_outline.mlir

      %0:2 = "tfl.while"(%cst_0, %cst_1) ({
      ^bb0(%arg0: tensor<*xi32>, %arg1: tensor<*xf32>):
        // CHECK: call @WhileOp_cond
        // CHECK-SAME: (tensor<*xi32>, tensor<*xf32>, tensor<i32>)
        %1 = func.call @WhileOp_cond(%arg0, %arg1, %cst) : (tensor<*xi32>, tensor<*xf32>, tensor<i32>) -> tensor<i1>
        "tfl.yield"(%1) : (tensor<i1>) -> ()
      },  {
      ^bb0(%arg0: tensor<*xi32>, %arg1: tensor<*xf32>):
        // CHECK: call @WhileOp_body
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 13.5K bytes
    - Viewed (0)
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