return new TreeRow(rowKey, fromKey, upperBound);
    }

    @Override
    public C firstKey() {
      updateBackingRowMapField();
      if (backingRowMap == null) {
        throw new NoSuchElementException();
      }
      return ((SortedMap<C, V>) backingRowMap).firstKey();
    }

    @Override
    public C lastKey() {
      updateBackingRowMapField();

    return Iterables.<@Nullable Entry<K, V>>getFirst(entrySet(), null);
  }

  /**
   * A sensible definition of {@link #firstKey} in terms of {@code firstEntry}. If you override
   * {@code firstEntry}, you may wish to override {@code firstKey} to forward to this
   * implementation.
   */
  protected K standardFirstKey() {
    Entry<K, V> entry = firstEntry();
    if (entry == null) {

    return Iterables.<@Nullable Entry<K, V>>getFirst(entrySet(), null);
  }

  /**
   * A sensible definition of {@link #firstKey} in terms of {@code firstEntry}. If you override
   * {@code firstEntry}, you may wish to override {@code firstKey} to forward to this
   * implementation.
   */
  protected K standardFirstKey() {
    Entry<K, V> entry = firstEntry();
    if (entry == null) {

      return new TreeRow(rowKey, fromKey, upperBound);
    }

    @Override
    public C firstKey() {
      updateBackingRowMapField();
      if (backingRowMap == null) {
        throw new NoSuchElementException();
      }
      return ((SortedMap<C, V>) backingRowMap).firstKey();
    }

    @Override
    public C lastKey() {
      updateBackingRowMapField();

			}
		} else if rc.hasRegs() {
			firstReg := uint32(0)
			for i := 0; i < int(which); i++ {
				firstReg += uint32(len(aux.abiInfo.OutParam(i).Registers))
			}
			reg := int64(rc.nextSlice + Abi1RO(firstReg))
			a = makeOf(a, OpSelectN, []*Value{call})
			a.AuxInt = reg
		} else {

	return (int64(curQ) & 1 << 30) | (int64(curSize&3) << 10), nil
}

// ARM64RegisterListOffset generates offset encoding according to AArch64 specification.
func ARM64RegisterListOffset(firstReg, regCnt int, arrangement int64) (int64, error) {
	offset := int64(firstReg)
	switch regCnt {
	case 1:
		offset |= 0x7 << 12
	case 2:
		offset |= 0xa << 12
	case 3:
		offset |= 0x6 << 12
	case 4:
		offset |= 0x2 << 12
	default:

			ext := tok.String()
			curArrangement, err := arch.ARM64RegisterArrangement(reg, name, ext)
			if err != nil {
				p.errorf(err.Error())
			}
			if firstReg == -1 {
				// only record the first register and arrangement
				firstReg = int(reg)
				nextReg = firstReg
				arrangement = curArrangement
			} else if curArrangement != arrangement {
				p.errorf("inconsistent arrangement in ARM64 register list")

	// more than one of each per m, p, and goroutine.
	firstGen := traceNextGen(trace.lastNonZeroGen)

	// Reset GC sequencer.
	trace.seqGC = 1

	// Reset trace reader state.
	trace.headerWritten = false
	trace.readerGen.Store(firstGen)
	trace.flushedGen.Store(0)

	// Register some basic strings in the string tables.
	traceRegisterLabelsAndReasons(firstGen)

	// Stop the world.
	//

    return ImmutableSortedSet.copyOf(comparator, sortedDelegate.keySet());
  }

  public Comparator<? super K> comparator() {
    return comparator;
  }

  @CheckForNull
  public K firstKey() {
    return sortedDelegate.firstKey();
  }

  @CheckForNull
  public K lastKey() {
    return sortedDelegate.lastKey();
  }

  @CheckForNull
  K higher(K k) {

    @CheckForNull
    public Comparator<? super K> comparator() {
      return sortedMap().comparator();
    }

    @Override
    @ParametricNullness
    public K firstKey() {
      return sortedMap().firstKey();
    }

    @Override
    @ParametricNullness
    public K lastKey() {
      return sortedMap().lastKey();
    }

    @Override