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Results 11 - 20 of 25 for _output_shapes (0.53 sec)
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tensorflow/compiler/mlir/lite/utils/utils.h
inline DenseElementsAttr GetShape(Value output_val, bool truncate = false) { auto output_shape = output_val.getType().dyn_cast<ShapedType>().getShape(); SmallVector<int32_t> shape; shape.reserve(output_shape.size()); bool needs_truncation = true; for (size_t dim_idx = 0; dim_idx < output_shape.size(); ++dim_idx) { int64_t dim = output_shape[dim_idx]; if (truncate && needs_truncation && dim == 1) { continue;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Apr 30 00:40:15 UTC 2024 - 11.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_tf_xla_op_to_tf_op.cc
// dimensions. SmallVector<int64_t> output_shape(output_tensor_rank); for (int i = 0; i < output_tensor_rank; i++) { if (collapsed_dims.contains(i)) { // The collapsed dimension's size should have been 1, so it restores the // dimension with size 1. output_shape[i] = 1; } else { output_shape[i] = *shape_itr; shape_itr++; } }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 13.2K bytes - Viewed (0) -
tensorflow/compiler/jit/encapsulate_util.cc
std::vector<PartialTensorShape> output_shapes; std::transform(iter.second.begin(), iter.second.end(), std::back_inserter(output_shapes), [](const InferredShape& inferred_shape) { return inferred_shape.shape; }); Node* n = node_name_index[iter.first]; n->AddAttr(kXlaInferredShapesAttrName, output_shapes); } return absl::OkStatus();
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Mar 12 06:33:33 UTC 2024 - 15.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_xla_attribute_utils.cc
SmallVector<int64_t> output_shape(input_shape.getShape().begin(), input_shape.getShape().end()); for (int i : spatial_dims) { output_shape[i] += padding_values[2 * i] + padding_values[2 * i + 1]; } return builder.create<TF::PadV2Op>( loc, RankedTensorType::get(output_shape, builder.getI8Type()), input, temp_padding,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 17 17:58:54 UTC 2024 - 13.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/utils/xla_sharding_util.cc
const mlir::TensorType cluster_func_output_type, const xla::OpSharding& output_sharding, mlir::Type* tiled_logical_computation_type) { const auto output_shape = cluster_func_output_type.getShape(); auto new_output_shape = llvm::to_vector<4>(output_shape); auto dimension_to_splits_map = GetDimensionIndicesAndNumSplitsFromSharding(output_sharding); if (!dimension_to_splits_map.ok()) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 22 21:28:13 UTC 2024 - 34K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/passes/replace_cast_hacks_with_tf_xla_ops.cc
} // Gather shapes for output. for (auto v : ddn.lhs_batch_dimensions()) { output_shape.push_back(lhs_shape[v]); } // Batch dimension is gathered from the right side. if (output_shape.empty()) { for (auto v : ddn.rhs_batch_dimensions()) { output_shape.push_back(rhs_shape[v]); } } // Gather remaining dimensions.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 47.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/mlrt/tf_to_mlrt.mlir
%2 = "tf.Const"() {__op_key = 2: i32, device = "/device:CPU:0", value = dense<1> : tensor<i64>} : () -> tensor<i64> %3 = "tf.RangeDataset"(%0, %1, %2) {__op_key = 3: i32, device = "/device:CPU:0", output_shapes = [#tf_type.shape<>], output_types = [i64], metadata = ""} : (tensor<i64>, tensor<i64>, tensor<i64>) -> tensor<!tf_type.variant> // CHECK: tf_mlrt.executeop{{.*}}op: \22FlatMapDataset\22
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 31 20:44:15 UTC 2024 - 24.7K bytes - Viewed (0) -
tensorflow/c/c_api_experimental.cc
continue; } shape.dims = new int64_t[shape.num_dims]; for (size_t j = 0; j < shape.num_dims; ++j) { shape.dims[j] = c.Value(c.Dim(shape_handle, j)); } } if (output_shapes != nullptr) *output_shapes = output_shapes_result; // TODO(bgogul): Set output_resource_shapes_and_types. } void TF_ImportGraphDefOptionsSetValidateColocationConstraints(
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Apr 15 03:35:10 UTC 2024 - 29.4K bytes - Viewed (0) -
tensorflow/compiler/jit/xla_launch_util.cc
const xla::HloInputOutputAliasConfig& input_output_alias, absl::Span<const int> input_mapping, const std::map<int, const Tensor*>& resource_vars_snapshots, DataType output_dtype, const TensorShape& output_shape, Allocator* output_allocator, bool allocate_xla_tensors, se::Stream* stream, bool use_multiple_streams, std::shared_ptr<se::Event> definition_event) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 16 00:36:08 UTC 2024 - 40.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/utils/convert_tensor.cc
return ConvertTensor(t, builder); } void ConvertToTensorShapeProto(ArrayRef<int64_t> shape, TensorShapeProto* output_shape) { for (auto d : shape) { output_shape->add_dim()->set_size(ShapedType::isDynamic(d) ? kTFDynamicSize : d); } }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Apr 26 09:37:10 UTC 2024 - 20.5K bytes - Viewed (0)