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Results 31 - 39 of 39 for 4x3xf32 (0.21 sec)
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tensorflow/compiler/mlir/quantization/common/lift_as_function_call_test.cc
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 10 04:07:09 UTC 2024 - 26.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/functional-control-flow-to-cfg.mlir
// CHECK-LABEL: func @testWhileCasts(%arg0: tensor<!tf_type.variant<tensor<1x3xf32>>>) -> tensor<!tf_type.variant<tensor<*xf32>>> func.func @testWhileCasts(%arg0: tensor<!tf_type.variant<tensor<1x3xf32>>>) -> (tensor<!tf_type.variant<tensor<*xf32>>>) { %0 = "tf.While"(%arg0) { cond = @testWhileCond, body = @testWhileBody, is_stateless = false } : (tensor<!tf_type.variant<tensor<1x3xf32>>>) -> (tensor<!tf_type.variant<tensor<*xf32>>>)
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 12.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_sharding_identification.mlir
} func.func @_func(%arg0: tensor<2x4xf32>, %arg1: tensor<4x2xf32>) -> tensor<2x2xf32> { %0 = "tf.MatMul"(%arg0, %arg1) {_XlaSharding = "\08\03\1A\02\02\01\22\02\00\01"} : (tensor<2x4xf32>, tensor<4x2xf32>) -> tensor<2x2xf32> %1 = "tf.Identity"(%0) : (tensor<2x2xf32>) -> tensor<2x2xf32> return %1 : tensor<2x2xf32> } // ----- // The following op sharding is used in the following test case:
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Feb 20 19:07:52 UTC 2024 - 47.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/tests/legalize-tf-prefer-tf2xla.mlir
// NOFALLBACK-LABEL: @xla_svd func.func @xla_svd(%arg0: tensor<1x1xf32>) -> (tensor<1xf32>, tensor<1x1xf32>, tensor<1x1xf32>) { // NOFALLBACK: XlaSvd %s, %u, %v = "tf.XlaSvd"(%arg0) {max_iter = 1, epsilon = 1.0E-09 : f32, precision_config = ""} : (tensor<1x1xf32>) -> (tensor<1xf32>, tensor<1x1xf32>, tensor<1x1xf32>) func.return %s, %u, %v : tensor<1xf32>, tensor<1x1xf32>, tensor<1x1xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Apr 06 15:32:52 UTC 2024 - 15.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/fuse_tpu_compile_and_execute_ops.mlir
%1 = "tf.ReadVariableOp"(%0) {device = "/CPU:0"} : (tensor<!tf_type.resource<tensor<1x1xf32>>>) -> tensor<1x1xf32> %2:2 = "tf.Split"(%cst, %arg0) {device = "/CPU:0"} : (tensor<i32>, tensor<1x4xf32>) -> (tensor<1x2xf32>, tensor<1x2xf32>) %3:2 = "tf.Split"(%cst, %2#0) {device = "/CPU:0"} : (tensor<i32>, tensor<1x2xf32>) -> (tensor<1x1xf32>, tensor<1x1xf32>)
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 13.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/einsum.mlir
} func.func @einsum_matmul(%arg0: tensor<7x9xf32>, %arg1: tensor<9x5xf32>) -> tensor<7x5xf32> { %0 = "tf.Einsum"(%arg0, %arg1) {T = "tfdtype$DT_FLOAT", equation = "ae,ed->ad"}: (tensor<7x9xf32>, tensor<9x5xf32>) -> tensor<7x5xf32> func.return %0 : tensor<7x5xf32> // CHECK-LABEL: einsum_matmul // CHECK: %[[v0:.*]] = "tf.BatchMatMulV2"(%arg0, %arg1) <{adj_x = false, adj_y = false}> : (tensor<7x9xf32>, tensor<9x5xf32>) -> tensor<7x5xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Jan 05 18:35:42 UTC 2024 - 25.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/mark_ops_for_outside_compilation.mlir
%2:2 = "tf.RecvTPUEmbeddingActivations"() {_tpu_embedding_layer = "call1", config = "\0A\0B\0C\0D"} : () -> (tensor<2x2xf32>, tensor<4x4xf32>) "tf.SendTPUEmbeddingGradients"(%2#0, %2#1) {_tpu_embedding_layer = "call1", config = "\0A\0B\0C\0D", operandSegmentSizes = array<i32: 2, 0>} : (tensor<2x2xf32>, tensor<4x4xf32>) -> () tf_device.return
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Apr 24 16:22:32 UTC 2024 - 29.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/composite-lowering.mlir
%23 = mhlo.add %21, %22 : tensor<4xf32> %24 = "mhlo.broadcast_in_dim"(%3) <{broadcast_dimensions = dense<> : tensor<0xi64>}> : (tensor<f32>) -> tensor<4xf32> %25 = mhlo.multiply %23, %24 : tensor<4xf32> %26 = "mhlo.broadcast_in_dim"(%2) <{broadcast_dimensions = dense<> : tensor<0xi64>}> : (tensor<f32>) -> tensor<4xf32> %27 = mhlo.divide %25, %26 : tensor<4xf32> %28 = mhlo.floor %27 : tensor<4xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 18:45:51 UTC 2024 - 32.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/quantize.mlir
} // CHECK-LABEL: QuantizeConcat func.func @QuantizeConcat(tensor<1x2xf32>, tensor<1x2xf32>) -> tensor<2x2x!quant.uniform<u8:f32, 1.000000e-01:128>> { ^bb0(%arg0: tensor<1x2xf32>, %arg1: tensor<1x2xf32>): %0 = "tfl.concatenation"(%arg0, %arg1) {axis = 0 : i32, fused_activation_function = "NONE"} : (tensor<1x2xf32>, tensor<1x2xf32>) -> tensor<2x2xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 28 23:10:13 UTC 2024 - 39.7K bytes - Viewed (0)