Search Options

Results per page
Sort
Preferred Languages
Advance

Results 11 - 15 of 15 for add32a (0.14 sec)

  1. tensorflow/compiler/mlir/tensorflow/tests/tpu_validate_inputs.mlir

        %0, %c0 = tf_executor.island wraps "tf.AddV2"(%arg0, %arg1) {_tpu_replicate = "cluster"} : (tensor<i32>, tensor<i32>) -> tensor<i32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 07 06:51:01 UTC 2024
    - 15.7K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/tfrt/tests/tf_to_corert/control_flow.mlir

      %next_index = "tf.AddV2"(%index, %one) {device = "/job:localhost/replica:0/task:0/device:CPU:0"} : (tensor<i32>, tensor<i32>) -> tensor<i32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 14 00:40:32 UTC 2024
    - 17.5K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/tf2xla/internal/passes/tpu_sharding_identification_pass.cc

            // Exp, ceil, etc.
            def->hasTrait<mlir::OpTrait::SameOperandsAndResultType>() ||
            // Identity
            def->hasTrait<mlir::OpTrait::TF::OperandsSameAsResultsTypeOrRef>() ||
            // AddV2, Sub, etc.
            (def->hasTrait<
                 mlir::OpTrait::TF::SameOperandsAndResultElementTypeResolveRef>() &&
             def->hasTrait<mlir::OpTrait::TF::CwiseBinary>())) {
          for (auto operand : def->getOperands()) {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Apr 30 02:01:13 UTC 2024
    - 28.9K bytes
    - Viewed (0)
  4. src/runtime/sys_linux_ppc64x.s

    //	struct timespec *timeout, int32 *uaddr2, int32 val2);
    TEXT runtime·futex(SB),NOSPLIT|NOFRAME,$0
    	MOVD	addr+0(FP), R3
    	MOVW	op+8(FP), R4
    	MOVW	val+12(FP), R5
    	MOVD	ts+16(FP), R6
    	MOVD	addr2+24(FP), R7
    	MOVW	val3+32(FP), R8
    	SYSCALL	$SYS_futex
    	BVC	2(PC)
    	NEG	R3	// caller expects negative errno
    	MOVW	R3, ret+40(FP)
    	RET
    
    // int64 clone(int32 flags, void *stk, M *mp, G *gp, void (*fn)(void));
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 18.1K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

    		{name: "LoweredAtomicLoadPtr", argLength: 2, reg: gpload, typ: "Int64", aux: "Int64", clobberFlags: true, faultOnNilArg0: true},
    
    		// atomic add32, 64
    		// LWSYNC
    		// LDAR         (Rarg0), Rout
    		// ADD		Rarg1, Rout
    		// STDCCC       Rout, (Rarg0)
    		// BNE          -3(PC)
    		// return new sum
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
Back to top