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Results 51 - 60 of 156 for I32 (0.03 sec)
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tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/convert_tf_quant_to_mhlo_int_test.cc
%input_zp = "tf.Const"() { value = dense<-10> : tensor<i32> } : () -> tensor<i32> %filter_scale = "tf.Const"() { value = dense<0.5> : tensor<f32> } : () -> tensor<f32> %filter_zp = "tf.Const"() { value = dense<0> : tensor<i32> } : () -> tensor<i32> %accum_scale = "tf.Const"() { value = dense<1.0> : tensor<f32> } : () -> tensor<f32> %accum_zp = "tf.Const"() { value = dense<0> : tensor<i32> } : () -> tensor<i32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Apr 03 01:03:21 UTC 2024 - 35.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/split_into_island_per_op.mlir
func.func @stateful_composite_op_control_else(%arg0: tensor<*x!tf_type.resource<tensor<i32>>>) -> tensor<i32> { %0 = tf_executor.graph { %outputs, %control = tf_executor.island { %1 = "tf.Const"() {value = dense<1> : tensor<i32>} : () -> tensor<i32> "tf.AssignVariableOp"(%arg0, %1) : (tensor<*x!tf_type.resource<tensor<i32>>>, tensor<i32>) -> () tf_executor.yield %1 : tensor<i32> } tf_executor.fetch %outputs : tensor<i32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 20.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/experimental/tac/tests/fold-constants-to-subgraph.mlir
%0 = "tfl.conv_2d"(%arg0, %arg1, %arg2) {tac.device = "GPU", tac.inference_type = "FLOAT", dilation_h_factor = 1 : i32, dilation_w_factor = 1 : i32, fused_activation_function = "NONE", padding = "VALID", stride_h = 1 : i32, stride_w = 1 : i32} : (tensor<256x32x32x3xf32>, tensor<16x3x3x3xf32>, tensor<16xf32>) -> tensor<256x30x30x16xf32> func.return %0 : tensor<256x30x30x16xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 10.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/api/v2/legalize_tf_test.cc
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 13 23:59:33 UTC 2024 - 16.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/insert_calibration_statistics_saver.mlir
// CKECK-SAME: <{calibration_method = 5 : i32, id = "0", num_bins = 32 : i32, max_percentile = 0.000000e+00 : f32, min_percentile = 0.000000e+00 : f32}> : (tensor<1x3x4x3xf32>) -> (tensor<1x3x4x3xf32>, tensor<f32>, tensor<f32>, tensor<512xi64>) // CHECK: %[[CUSTOM_AGGREGATOR_1:.*]], %[[MIN_1:.*]], %[[MAX_1:.*]], %[[HISTOGRAM_1:.*]] = "tf.CustomAggregator"
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 01:09:50 UTC 2024 - 24.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_space_to_depth_pass.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 37.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfr/tests/canonicalize.mlir
%0 = "arith.constant"() {value = 42 : i32} : () -> i32 %1 = "arith.constant"() {value = 41 : i32} : () -> i32 %2 = "tfr.build_list"(%0, %1) : (i32, i32) -> !tfr.attr %3 = "tfr.build_list"(%0, %1) : (i32, i32) -> !tfr.attr %4 = "tfr.build_list"(%2, %3) : (!tfr.attr, !tfr.attr) -> !tfr.attr func.return %4 : !tfr.attr // CHECK-NEXT: %[[c:.*]] = tfr.constant {{\[}}[42 : i32, 41 : i32], [42 : i32, 41 : i32]] -> !tfr.attr
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 11.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tf_executor_ops_invalid.mlir
func.func @invalid_switchN(%arg0: tensor<*xi32>, %arg1: tensor<i32>) -> i32 { %result = tf_executor.graph { %1:3 = "tf_executor._SwitchN"(%arg0, %arg1) {num_outs = 2} : (tensor<*xi32>, tensor<i32>) -> (i32, tensor<i32>, !tf_executor.control) // expected-error@-1 {{'tf_executor._SwitchN' op expects outputs to have tensor type but got 'i32'}} tf_executor.fetch %1#0 : i32 } func.return %result : i32 } // -----
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Oct 19 01:12:10 UTC 2023 - 28.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/quantize.mlir
%1 = "tfl.max_pool_2d"(%0) {filter_height = 1 : i32, filter_width = 1 : i32, fused_activation_function = "RELU6", padding = "SAME", stride_h = 1 : i32, stride_w = 1 : i32} : (tensor<1x6x6x16xf32>) -> tensor<1x1x1x16xf32> func.return %1 : tensor<1x1x1x16xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 28 23:10:13 UTC 2024 - 39.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/insert_custom_aggregation_ops.mlir
// MIN-MAX-CHECK-NEXT: [[lhs:%.*]], {{.*}}, {{.*}}, {{.*}} = "tf.CustomAggregator"(%arg0) <{calibration_method = 1 : i32, id = "composite_conv2d_with_relu6_fn_arg_0_calibration_method_1",...
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 10 04:07:09 UTC 2024 - 32.1K bytes - Viewed (0)