GLOBL	·alignPcFnAddr(SB),RODATA,$8
DATA	·alignPcFnAddr(SB)/8,$·alignPc(SB)
`,
	"loong64": `
#include "textflag.h"

TEXT	·alignPc(SB),NOSPLIT, $0-0
	MOVV	$2, R4
	PCALIGN	$512
	MOVV	$3, R5
	RET

GLOBL	·alignPcFnAddr(SB),RODATA,$8
DATA	·alignPcFnAddr(SB)/8,$·alignPc(SB)
`,
}

// TestFuncAlign verifies that the address of a function can be aligned
// with a specific value on arm64 and loong64.

        color: #fff;
        background: #555;
        text-align: center;
        cursor: help;
      }
      .help > span {
        display: none;
      }
      .help:hover > span {
        display: block;
        position: absolute;
        left: 1.1em;
        top: 1.1em;
        background: #555;
        text-align: left;
        width: 20em;
        padding: 0.5em;

      // Keywords obtained from http://en.cppreference.com/w/cpp/keyword
      kCPPReserved = new absl::flat_hash_set<StringPiece, StringPieceHasher>{
          "alignas",
          "alignof",
          "and",
          "and_eq",
          "asm",
          "atomic_cancel",
          "atomic_commit",
          "atomic_noexcept",
          "auto",
          "bitand",

// Callee-saved registers are: R19...R28.
// Temporary registers are: R9...R15
// SP must be 16-byte aligned.

// When calling racecalladdr, R9 is the call target address.

// The race ctx, ThreadState *thr below, is passed in R0 and loaded in racecalladdr.

// Darwin may return unaligned thread pointer. Align it. (See tls_arm64.s)
// No-op on other OSes.
#ifdef TLS_darwin
#define TP_ALIGN	AND	$~7, R0
#else

	pgms := []struct {
		text   []byte
		align  string
		hasNop bool
	}{
		{[]byte(x0pgm), "align=0x0", false},     // No alignment or nop adjustments needed
		{[]byte(x16pgm), "align=0x20", false},   // Increased alignment needed
		{[]byte(x32pgm), "align=0x40", false},   // Worst case alignment needed
		{[]byte(x64pgm), "align=0x0", true},     // 0 aligned is default (16B) alignment

	REG_R18
	REG_R19
	REG_R20
	REG_R21
	REG_R22
	REG_R23
	REG_R24
	REG_R25
	REG_R26
	REG_R27
	REG_R28
	REG_R29
	REG_R30
	REG_R31

	// CR bits. Use Book 1, chapter 2 naming for bits. Keep aligned to 32
	REG_CR0LT
	REG_CR0GT
	REG_CR0EQ
	REG_CR0SO
	REG_CR1LT
	REG_CR1GT
	REG_CR1EQ
	REG_CR1SO
	REG_CR2LT
	REG_CR2GT
	REG_CR2EQ
	REG_CR2SO
	REG_CR3LT
	REG_CR3GT
	REG_CR3EQ
	REG_CR3SO

    cursor: pointer;
    display: inline-block;
    font-weight: normal;
    font-family: 'Lato', Arial, sans-serif;
    margin: 0;
    padding: 4px 20px;
    min-width: 130px;
    max-width: 320px;
    text-align: center;
    filter: grayscale(1);
    -webkit-filter: grayscale(1);
    opacity: 0.7;
}

.multi-language-selector .language-option.selected {
    background-color: #f7f7f8;
    color: #02303a;

				}
				sh := new(Section)
				sh.Name = cstring(sh32.Name[0:])
				sh.Seg = cstring(sh32.Seg[0:])
				sh.Addr = uint64(sh32.Addr)
				sh.Size = uint64(sh32.Size)
				sh.Offset = sh32.Offset
				sh.Align = sh32.Align
				sh.Reloff = sh32.Reloff
				sh.Nreloc = sh32.Nreloc
				sh.Flags = sh32.Flags
				if err := f.pushSection(sh, r); err != nil {
					return nil, err
				}
			}

		case LoadCmdSegment64:

          (TF_MatrixSetDiagOp $input, $diagonal)>;

// `align` attribute can be ignored because we only support converting
// `MatrixSetDiagV3` to `MatrixSetDiag` with default `k` inputs.
def ConvertMatrixSetDiagV3ToMatrixSetDiag :
      Pat<(TF_MatrixSetDiagV3Op $input, $diagonal,
            (Arith_ConstantOp ConstantAttr<I32ElementsAttr, "{0}">),
            $align),
          (TF_MatrixSetDiagOp $input, $diagonal)>;

// atomic functions (types [Int64] and [Uint64] are automatically aligned).
// The first word in an allocated struct, array, or slice; in a global
// variable; or in a local variable (because the subject of all atomic operations
// will escape to the heap) can be relied upon to be 64-bit aligned.

// SwapInt32 atomically stores new into *addr and returns the previous *addr value.