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Results 51 - 60 of 143 for I32 (0.12 sec)

  1. tensorflow/compiler/mlir/tensorflow/tests/tpu_space_to_depth_pass.mlir

        %8 = "tf.Identity"(%arg1) {device = ""} : (tensor<i32>) -> tensor<i32>
        %9 = "tf.Identity"(%2) {device = ""} : (tensor<i32>) -> tensor<i32>
        %10 = "tf.AddV2"(%arg0, %0) {device = ""} : (tensor<i32>, tensor<i32>) -> tensor<i32>
        %11 = "tf.Identity"(%10) {device = ""} : (tensor<i32>) -> tensor<i32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 37.4K bytes
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  2. tensorflow/compiler/mlir/tfr/tests/canonicalize.mlir

      %0 = "arith.constant"() {value = 42 : i32} : () -> i32
      %1 = "arith.constant"() {value = 41 : i32} : () -> i32
      %2 = "tfr.build_list"(%0, %1) : (i32, i32) -> !tfr.attr
      %3 = "tfr.build_list"(%0, %1) : (i32, i32) -> !tfr.attr
      %4 = "tfr.build_list"(%2, %3) : (!tfr.attr, !tfr.attr) -> !tfr.attr
      func.return %4 : !tfr.attr
    
    // CHECK-NEXT: %[[c:.*]] = tfr.constant {{\[}}[42 : i32, 41 : i32], [42 : i32, 41 : i32]] -> !tfr.attr
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 11.1K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/tensorflow/tests/tf_executor_ops_invalid.mlir

    func.func @invalid_switchN(%arg0: tensor<*xi32>, %arg1: tensor<i32>) -> i32 {
      %result = tf_executor.graph {
        %1:3 = "tf_executor._SwitchN"(%arg0, %arg1) {num_outs = 2} : (tensor<*xi32>, tensor<i32>) -> (i32, tensor<i32>, !tf_executor.control)
    // expected-error@-1 {{'tf_executor._SwitchN' op expects outputs to have tensor type but got 'i32'}}
        tf_executor.fetch %1#0 : i32
      }
      func.return %result : i32
    }
    
    // -----
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Oct 19 01:12:10 UTC 2023
    - 28.2K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/tests/quantize.mlir

      %1 = "tfl.max_pool_2d"(%0) {filter_height = 1 : i32, filter_width = 1 : i32, fused_activation_function = "RELU6", padding = "SAME", stride_h = 1 : i32, stride_w = 1 : i32} : (tensor<1x6x6x16xf32>) -> tensor<1x1x1x16xf32>
      func.return %1 : tensor<1x1x1x16xf32>
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 28 23:10:13 UTC 2024
    - 39.7K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/quantization/tensorflow/tests/insert_custom_aggregation_ops.mlir

    // MIN-MAX-CHECK-NEXT:  [[lhs:%.*]], {{.*}}, {{.*}}, {{.*}} = "tf.CustomAggregator"(%arg0) <{calibration_method = 1 : i32, id = "composite_conv2d_with_relu6_fn_arg_0_calibration_method_1",...
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri May 10 04:07:09 UTC 2024
    - 32.1K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/lite/tests/const-fold.mlir

    func.func @pseudo_const() -> tensor<i32> {
      // CHECK: %[[CST:.*]] = arith.constant dense<1> : tensor<i32>
      // CHECK: return %[[CST]]
      %0 = "tfl.pseudo_const"() {value = dense<1> : tensor<i32>} : () -> tensor<i32>
      func.return %0 : tensor<i32>
    }
    
    
    // CHECK-LABEL: @range_int
    func.func @range_int() -> tensor<?xi32> {
      %cst = arith.constant dense<0> : tensor<i32>
      %cst_1 = arith.constant dense<4> : tensor<i32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 45.8K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/tf2xla/tests/legalize-tf-prefer-tf2xla.mlir

        // CHECK-NEXT: %4 = mhlo.convert %3 : tensor<i32>
        // CHECK-NEXT: %5 = "mhlo.slice"(%1) <{limit_indices = dense<2> : tensor<1xi64>, start_indices = dense<1> : tensor<1xi64>, strides = dense<1> : tensor<1xi64>}> : (tensor<4xi32>) -> tensor<1xi32>
        // CHECK-NEXT: %6 = mhlo.reshape %5 : (tensor<1xi32>) -> tensor<i32>
        // CHECK-NEXT: %7 = mhlo.convert %6 : tensor<i32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Sat Apr 06 15:32:52 UTC 2024
    - 15.8K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/lite/tests/prepare-quantize-signed.mlir

      %conv = "tfl.conv_2d"(%0, %w, %b) {
        dilation_h_factor = 1 : i32, dilation_w_factor = 1 : i32, fused_activation_function = "RELU",
        padding = "SAME", stride_h = 1 : i32, stride_w = 1 : i32
      } : (tensor<1x5x5x2xf32>, tensor<3x1x1x2xf32>, tensor<3xf32>) -> tensor<1x5x5x3xf32>
      %conv2 = "tfl.conv_2d"(%0, %w, %b2) {
        dilation_h_factor = 1 : i32, dilation_w_factor = 1 : i32, fused_activation_function = "RELU",
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 18.4K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/lite/tests/dilated-conv.mlir

      %cst_0 = "tf.Const"() { value = dense<3> : tensor<i32> } : () -> tensor<i32>
      %cst_1 = arith.constant dense<4> : tensor<2x2xi32>
      %cst_2 = arith.constant dense<0> : tensor<2x2xi32>
      %0 = "tf.SpaceToBatchND"(%arg0, %cst, %cst_1) : (tensor<1x128x128xf32>, tensor<2xi32>, tensor<2x2xi32>) -> tensor<4x68x68xf32>
      %1 = "tf.ExpandDims"(%0, %cst_0) : (tensor<4x68x68xf32>, tensor<i32>) -> tensor<4x68x68x1xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 44.7K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/quantization/tensorflow/tests/quantize_composite_functions_weight_only.mlir

    // PerTensor-DAG: %[[zp:.*]] = "tf.Const"() <{value = dense<0> : tensor<i32>}> : () -> tensor<i32>
    // PerTensor: %[[out:.*]] = "tf.PartitionedCall"(%arg0, %[[q_w]], %[[scale]], %[[zp]]) <{config = "", config_proto = "", executor_type = "",
    // PerTensor-SAME: f = @quantized_matmul_fn_0}> : (tensor<2x12xf32>, tensor<12x2xi8>, tensor<f32>, tensor<i32>) -> tensor<*xf32>
    // PerTensor: return %[[out]]
    
    // PerChannel-LABEL: func @matmul
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 11.3K bytes
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