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Results 81 - 90 of 163 for I64 (0.12 sec)

  1. tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/unwrap_xla_call_module_op.mlir

        %3 = "tf.XlaCallModule"(%2) <{Sout = [#tf_type.shape<6x5>], dim_args_spec = [], disabled_checks = [], has_token_input_output = false, module = "", platforms = ["CPU"], version = 9 : i64}> {_entry_function = @main_1, _stablehlo_module_attrs = {}, device = ""} : (tensor<3x10xf32>)...
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Feb 08 22:40:14 UTC 2024
    - 3.7K bytes
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  2. tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/optimize_graph.mlir

      %conv = stablehlo.convolution(%quant_arg, %quant_cst) dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f], window = {pad = [[0, 1], [1, 1]]} {batch_group_count = 1 : i64, feature_group_count = 1 : i64} : (tensor<1x3x4x3x!quant.uniform<i8:f32, 0.0039207626791561354:-128>>, tensor<2x3x3x2x!quant.uniform<i8<-127:127>:f32, 0.015>>) -> tensor<1x3x4x2x!quant.uniform<i32:f32, 5.8949912267181218E-5>>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Feb 08 22:40:14 UTC 2024
    - 2.6K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/tensorflow/tests/remove_unused_while_results.mlir

        %2 = "tf.OpC"(%arg3) {is_stateless = true} : (tensor<*xf32>) -> tensor<*xf32>
        "tf.Yield"(%1, %2) : (tensor<*xf32>, tensor<*xf32>) -> ()
      }) {is_stateless = true, parallel_iterations = 10 : i64} : (tensor<*xf32>, tensor<*xf32>) -> (tensor<*xf32>, tensor<*xf32>)
      return %0#1 : tensor<*xf32>
    }
    
    // -----
    
    // Check that we remove the second result and operand from the loop because the
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Sep 21 20:25:31 UTC 2022
    - 8.5K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/metrics/error_collector_inst_test.cc

              "Failed at tf.StridedSlice op\nsee current operation: %2 = "
              "\"tf.StridedSlice\"(%arg0, %1, %1, %0) <{begin_mask = 11 : "
              "i64, ellipsis_mask = 0 : i64, end_mask = 11 : i64, new_axis_mask = "
              "4 : i64, shrink_axis_mask = 0 : i64}> {device = \"\"} : "
              "(tensor<*xf32>, tensor<4xi32>, tensor<4xi32>, tensor<4xi32>) "
              "-> tensor<*xf32>\nError code: ERROR_NEEDS_FLEX_OPS",
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Mar 25 01:48:36 UTC 2024
    - 8.2K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tf2xla/transforms/legalization_op_config_test.cc

        %0:3 = "tf.Unpack"(%arg0) {axis = 0 : i64} : (tensor<3xi64>) -> (tensor<i64>, tensor<i64>, tensor<i64>)
        return
      }
    })";
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 30 03:31:01 UTC 2024
    - 8.4K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/quantization/tensorflow/tests/fake_quant_e2e_flow.mlir

      %0 = "tf.FakeQuantWithMinMaxArgs"(%arg1) {device = "", max = 2.000000e+00 : f32, min = -1.000000e+00 : f32, narrow_range = false, num_bits = 8 : i64} : (tensor<2x3x3x2xf32>) -> tensor<*xf32>
      %1 = "tf.FakeQuantWithMinMaxArgs"(%arg0) {device = "", max = 2.000000e-01 : f32, min = -1.000000e-01 : f32, narrow_range = false, num_bits = 8 : i64} : (tensor<1x3x4x3xf32>) -> tensor<*xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 3.5K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/prepare_quantize/prepare_quantize_int4.mlir

      // CHECK-SAME: quant.uniform<i4:f32, 0.13329366842905679:-1>
      // CHECK: %[[dq2:.*]] = "quantfork.dcast"(%[[q2]])
      // CHECK-SAME: quant.uniform<i4:f32, 0.13329366842905679:-1>
      %0 = "quantfork.stats"(%arg0) {bitsNum = 8 : i64, layerStats = dense<[-0.999415695, 0.99998933]> : tensor<2xf32>, narrowRange = false} : (tensor<?x3xf32>) -> tensor<?x3xf32>
      // CHECK: %[[dot:.*]] = stablehlo.dot %[[dq2]], %[[dq1]]
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Feb 08 22:40:14 UTC 2024
    - 1.7K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/tfrt/tests/mlrt/rewrite_ifrt_load_variable.mlir

    // CHECK-NEXT:    "tf.MatMul"(%arg0, [[TENSOR]]) : (tensor<1x3xf32>, tensor<3x1xf32>) -> tensor<1x1xf32>
    // CHECK-NEXT:    "tf.IfrtCall"(%arg0, [[ARRAYKEY]]) <{program_id = 6515870160938153680 : i64, variable_arg_indices = [1 : i32]}> {__tpu_compile_metadata_text = "retvals { sharding { } }"} : (tensor<1x3xf32>, tensor<!tf_type.string>) -> tensor<1x1xf32>
    // CHECK-NEXT:    return
    //
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 22 21:35:32 UTC 2024
    - 1.7K bytes
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  9. tensorflow/compiler/mlir/tensorflow/tests/compile_mlir_util/replicate-tensor-list-init-ops.mlir

        %elem_shape_2 = "tf.Const"() {value = dense<-1> : tensor<1xi32>} : () -> tensor<1xi32>
        %tls = "tf.TensorListStack"(%tl_set_item, %elem_shape_2) {num_elements = 300 : i64} : (tensor<!tf_type.variant<tensor<*xf32>>>, tensor<1xi32>) -> tensor<300x?xf32>
    
        %elem_2 = "tf.Const"() {value = dense<10.0> : tensor<9xf32>} : () -> tensor<9xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Feb 03 09:30:08 UTC 2023
    - 1.9K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/tensorflow/tests/mlir2graphdef/tf_tpu_embedding_ops.mlir

        %1:1 = tf_executor.island wraps "tf.SendTPUEmbeddingGradients"(%0) {N = 1 : i64, NN = 0 : i64, config = "test_config_send_embedding", operandSegmentSizes = array<i32: 1, 0>} : (tensor<512x256xf32>) -> () loc("SendTPUEmbedding")
        tf_executor.fetch
      }
      func.return
    }
    
    // CHECK:       name: "RecvTPUEmbedding"
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Aug 14 15:35:49 UTC 2023
    - 1.9K bytes
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