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Results 51 - 60 of 169 for 1xi32 (0.05 sec)

  1. tensorflow/compiler/mlir/lite/metrics/testdata/strided_slice.mlir

      %18 = "tf.Const"() {value = dense<1> : tensor<4xi32>} : () -> tensor<4xi32>
      %57 = "tf.Const"() {value = dense<0> : tensor<4xi32>} : () -> tensor<4xi32>
      %534 = "tf.StridedSlice"(%arg0, %57, %57, %18) {begin_mask = 11 : i64, device = "", ellipsis_mask = 0 : i64, end_mask = 11 : i64, new_axis_mask = 4 : i64, shrink_axis_mask = 0 : i64} : (tensor<*xf32>, tensor<4xi32>, tensor<4xi32>, tensor<4xi32>) -> tensor<*xf32>
      "func.return"(%534) : (tensor<*xf32>) -> ()
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Mar 22 14:25:57 UTC 2022
    - 536 bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/tests/pin-ops-with-side-effects.mlir

        //body
        ^bb0(%arg_body: tensor<1xf32>):
        %result_body = "tfl.add"(%arg_body, %arg_body) { fused_activation_function = "NONE" } : (tensor<1xf32>, tensor<1xf32>) -> (tensor<1xf32>)
        "tfl.yield"(%result_body) : (tensor<1xf32>) -> ()
      }) : (tensor<1xf32>) -> (tensor<1xf32>)
      %tmp5 = "tfl.add"(%tmp4, %tmp2) { fused_activation_function = "NONE" } : (tensor<1xf32>, tensor<1xf32>) -> tensor<1xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Aug 17 10:45:19 UTC 2022
    - 5.6K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/tensorflow/tests/inlining.mlir

    func.func private @simple_callee() -> tensor<2xi32>  {
      %cst = "tf.Const"() { value = dense<2> : tensor<2xi32> } : () -> tensor<2xi32>
      func.return %cst : tensor<2xi32>
    }
    
    func.func private @simple_callee_with_noinline() -> tensor<2xi32> attributes {tf._noinline = true} {
      %cst = "tf.Const"() { value = dense<2> : tensor<2xi32> } : () -> tensor<2xi32>
      func.return %cst : tensor<2xi32>
    }
    
    // Test that simple TF operations can be inlined.
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 7.2K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/stablehlo/tests/tf-tfl-translate-serialize-stablehlo-division.mlir

    //RUN: tf_tfl_translate --enable-stablehlo-conversion --input-mlir %s -o /tmp/temp.stablehlo; [ -f /tmp/temp.stablehlo ]
    
    
    module {
    func.func @main(%arg0: tensor<2xi32>) -> tensor<2xi32> {
      %0 = "tf.Div"(%arg0, %arg0) : (tensor<2xi32>, tensor<2xi32>) -> tensor<2xi32>
      func.return %0 : tensor<2xi32>
    }
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Feb 24 20:01:54 UTC 2023
    - 306 bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/control_edges.mlir

      %tmp0, %ctl0 = tfl.control_node controls "tfl.neg"(%arg0): (tensor<1xf32>) -> tensor<1xf32>
      %tmp1, %ctl1 = tfl.control_node controls "tfl.neg"(%tmp0): (tensor<1xf32>) -> tensor<1xf32>
      %tmp2, %ctl2 = tfl.control_node controls "tfl.neg"(%tmp1): (tensor<1xf32>) -> tensor<1xf32>
      %tmp3, %ctl3 = tfl.control_node controls "tfl.neg"(%tmp2): (tensor<1xf32>) -> tensor<1xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Oct 14 21:40:53 UTC 2022
    - 3.6K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/tensorflow/tests/xla_call_module_serialization.mlir

        return %arg2 : tensor<?xi32>
      }
    
      // CHECK-LABEL: func @main
      // CHECK-SAME:    %[[ARG0:.*]]: tensor<10xi32>, %[[ARG1:.*]]: tensor<10xi32>
      func.func @main(%arg0: tensor<10xi32>, %arg1: tensor<10xi32>) -> tensor<10xi32> {
        // CHECK:      %[[RESULT:.*]] = "tf.XlaCallModule"(%[[ARG0]], %[[ARG1]])
        // CHECK-SAME:   Sout = [#tf_type.shape<?>]
        // CHECK-SAME:   dim_args_spec = []
        // CHECK-NOT:    _entry_function
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri May 26 03:48:35 UTC 2023
    - 2.2K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/stablehlo/tests/legalize-tfl-stablehlo-clamp.mlir

    module {
    func.func @main(%arg0: tensor<2xi32>, %arg1: tensor<2xi32>, %arg2: tensor<2xi32>) -> tensor<2xi32> {
      %0 = "tfl.custom"(%arg0, %arg1, %arg2) {custom_code = "stablehlo.clamp", custom_option = #tfl<const_bytes : "0x00000100002401">} : (tensor<2xi32>, tensor<2xi32>, tensor<2xi32>) -> tensor<2xi32>
      func.return %0 : tensor<2xi32>
    }
    }
    
    // CHECK:       module {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Dec 16 05:09:09 UTC 2022
    - 710 bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/lite/experimental/tac/tests/tac-filter.mlir

      func.func @testFunctionSkiped(%arg0: tensor<1xf32>, %arg1: tensor<1xf32>) {
        // CHECK: tfl.add
        // CHECK-SAME: tac.skip_target_annotation
        %0 = "tfl.add"(%arg0, %arg1) {fused_activation_function = "RELU6"} : (tensor<1xf32>, tensor<1xf32>) -> tensor<1xf32>
        // CHECK: tfl.add
        // CHECK-SAME: tac.skip_target_annotation
        %1 = "tfl.add"(%arg0, %0) {fused_activation_function = "RELU"} : (tensor<1xf32>, tensor<1xf32>) -> tensor<1xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 24 01:08:29 UTC 2023
    - 3.5K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/lite/stablehlo/tests/legalize-tfl-stablehlo.mlir

      func.return %1 : tensor<2xi32>
    }
    }
    
    // CHECK:       module {
    // CHECK-NEXT:  func @main(%arg0: tensor<2xi32>) -> tensor<2xi32> attributes {tf.entry_function = {inputs = "arg0", outputs = "tfl.custom1"}} {
    // CHECK-NEXT:    %0 = stablehlo.add %arg0, %arg0 : tensor<2xi32>
    // CHECK-NEXT:    %1 = stablehlo.subtract %0, %arg0 : tensor<2xi32>
    // CHECK-NEXT:    return %1 : tensor<2xi32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Dec 16 05:09:09 UTC 2022
    - 983 bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/tensorflow/tests/xla_call_module_deserialization.mlir

        // CHECK:     return %[[RESULT]]
        func.return %0 : tensor<10xi32>
      }
    
      // CHECK-LABEL: func @foo
      // CHECK-SAME:    %[[ARG0:.*]]: tensor<10xi32>, %[[ARG1:.*]]: tensor<10xi32>
      func.func @foo(%arg0: tensor<10xi32>, %arg1: tensor<10xi32>) -> tensor<10xi32> {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Nov 02 18:38:51 UTC 2023
    - 6.9K bytes
    - Viewed (0)
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