/* -1 disables use of REGARG */
const (
	REGARG = -1
)

const (
	REG_R0 = obj.RBaseARM + iota // must be 16-aligned
	REG_R1
	REG_R2
	REG_R3
	REG_R4
	REG_R5
	REG_R6
	REG_R7
	REG_R8
	REG_R9
	REG_R10
	REG_R11
	REG_R12
	REG_R13
	REG_R14
	REG_R15

	REG_F0 // must be 16-aligned
	REG_F1
	REG_F2
	REG_F3
	REG_F4
	REG_F5
	REG_F6
	REG_F7
	REG_F8
	REG_F9
	REG_F10

PCALIGN also changes the function alignment. If a function has one or more PCALIGN directives,
its address will be aligned to the same or coarser boundary, which is the maximum of all the
alignment values.

In the following example, the function Add is aligned with 128 bytes.

Examples:

	TEXT ·Add(SB),$40-16
	MOVD $2, R0
	PCALIGN $32
	MOVD $4, R1
	PCALIGN $128
	MOVD $8, R2
	RET

	// Different bytes have different bit masks (i.e: 1, 4, 16, 64)
	MOVD	$0x40100401, R5
	VMOV	R1, V0.B16
	// Work with aligned 32-byte chunks
	BIC	$0x1f, R0, R3
	VMOV	R5, V5.S4
	ANDS	$0x1f, R0, R9
	AND	$0x1f, R2, R10
	BEQ	loop

	// Input string is not 32-byte aligned. We calculate the
	// syndrome value for the aligned 32 bytes block containing
	// the first bytes and mask off the irrelevant part.
	VLD1.P	(R3), [V1.B16, V2.B16]

	SUBVU	R5, R4, R7
	AND	$7, R7
	BNE	R7, out

	// if less than 8 bytes, do byte copying
	SGTU	$8, R6, R7
	BNE	R7, out

	// do one byte at a time until 8-aligned
	AND	$7, R4, R8
	BEQ	R8, words
	MOVB	(R5), R7
	ADDV	$1, R5
	MOVB	R7, (R4)
	ADDV	$1, R4
	JMP	-6(PC)

words:
	// do 8 bytes at a time if there is room
	ADDV	$-7, R9, R6 // R6 is end pointer-7

	SUBVU	R2, R1, R4
	AND	$7, R4
	BNE	R4, out

	// if less than 8 bytes, do byte copying
	SGTU	$8, R3, R4
	BNE	R4, out

	// do one byte at a time until 8-aligned
	AND	$7, R1, R5
	BEQ	R5, words
	MOVB	(R2), R4
	ADDV	$1, R2
	MOVB	R4, (R1)
	ADDV	$1, R1
	JMP	-6(PC)

words:
	// do 8 bytes at a time if there is room
	ADDV	$-7, R6, R3 // R3 is end pointer-7

	MOV	$8, X9
	BLT	X11, X9, check4

	// Check alignment
	AND	$7, X10, X5
	BEQZ	X5, aligned

	// Zero one byte at a time until we reach 8 byte alignment.
	SUB	X5, X9, X5
	SUB	X5, X11, X11
align:
	SUB	$1, X5
	MOVB	ZERO, 0(X10)
	ADD	$1, X10
	BNEZ	X5, align

aligned:
	// X9 already contains $8
	BLT	X11, X9, check4
	MOV	$16, X9
	BLT	X11, X9, zero8
	MOV	$32, X9

			// Special case: sync/atomic.align64 is an
			// empty struct we recognize as a signal that
			// the struct it contains must be
			// 64-bit-aligned.
			//
			// This logic is equivalent to the logic in
			// cmd/compile/internal/types/size.go:calcStructOffset
			return 8
		}

		// spec: "For a variable x of struct type: unsafe.Alignof(x)
		// is the largest of the values unsafe.Alignof(x.f) for each

	BEQ	aligned			// aligned detected - skip copy

	// Copy the unaligned source data into the aligned temporary buffer
	// memmove(to=4(R13), from=8(R13), n=12(R13)) - Corrupts all registers
	MOVW	$buf, Rtable	// to
	MOVW	$64, Rc0		// n
	MOVM.IB	[Rtable,Rdata,Rc0], (R13)
	BL	runtime·memmove(SB)

	// Point to the local aligned copy of the data
	MOVW	$buf, Rdata

aligned:

			// Special case: sync/atomic.align64 is an
			// empty struct we recognize as a signal that
			// the struct it contains must be
			// 64-bit-aligned.
			//
			// This logic is equivalent to the logic in
			// cmd/compile/internal/types/size.go:calcStructOffset
			return 8
		}

		// spec: "For a variable x of struct type: unsafe.Alignof(x)
		// is the largest of the values unsafe.Alignof(x.f) for each

// license that can be found in the LICENSE file.

package unix

// Round the length of a raw sockaddr up to align it properly.
func cmsgAlignOf(salen int) int {
	salign := SizeofPtr
	if SizeofPtr == 8 && !supportsABI(_dragonflyABIChangeVersion) {
		// 64-bit Dragonfly before the September 2019 ABI changes still requires
		// 32-bit aligned access to network subsystem.
		salign = 4
	}
	return (salen + salign - 1) & ^(salign - 1)